From: Andreas Schwab Date: Fri, 5 Dec 2014 20:25:19 +0000 (+0000) Subject: * combine.c (is_parallel_of_n_reg_sets) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4b97b9f771161b0096bb5f120ccd64b084148d6b;p=gcc.git * combine.c (is_parallel_of_n_reg_sets) (can_split_parallel_of_n_reg_sets): Only define if !HAVE_cc0. From-SVN: r218436 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 48e713b4ef2..9538737c7d7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-12-05 Andreas Schwab + + * combine.c (is_parallel_of_n_reg_sets) + (can_split_parallel_of_n_reg_sets): Only define if !HAVE_cc0. + 2014-12-05 Andrew Pinski * config/aarch64/aarch64-simd-builtins.def (bswap): Use CF2 rather diff --git a/gcc/combine.c b/gcc/combine.c index e6deb419987..39f92009136 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -2461,6 +2461,7 @@ update_cfg_for_uncondjump (rtx_insn *insn) } } +#ifndef HAVE_cc0 /* Return whether INSN is a PARALLEL of exactly N register SETs followed by an arbitrary number of CLOBBERs. */ static bool @@ -2513,6 +2514,7 @@ can_split_parallel_of_n_reg_sets (rtx_insn *insn, int n) return true; } +#endif /* Try to combine the insns I0, I1 and I2 into I3. Here I0, I1 and I2 appear earlier than I3.