From: IkiWiki <ikiwiki.info>
Date: Sun, 18 Sep 2022 15:36:39 +0000 (+0100)
Subject: dummy commit
X-Git-Tag: opf_rfc_ls005_v1~367
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4bc97d3d227ec5753585ba5f50188918931ed40b;p=libreriscv.git

dummy commit
---

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index d9ebd84a7..c8722ac68 100644
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -345,7 +345,8 @@ mask `sv.bc/pm=r3`.
 Traditional Vector ISAs have vastly more (and more complex) addressing
 modes: unit strided, element strided, Indexed, Structure Packing. All
 of these had to be jammed in on top of existing Scalar instructions
-**without modifying the Scalar instructions**.  A small conceptual
+**without modifying or adding new Scalar instructions**.
+A small conceptual
 "cheat" was therefore needed.  The Immediate (D) is in some Modes
 multiplied by the element index, which gives us element-strided.
 For unit-strided the width of the operation (`ld`, 8 byte) is