From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 25 May 2019 01:32:02 +0000 (-0700)
Subject: Call proc
X-Git-Tag: yosys-0.9~109^2~4
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4bd9465ed3eb3ba2c0f45830b3337eaace4ec562;p=yosys.git

Call proc
---

diff --git a/tests/various/opt_rmdff.ys b/tests/various/opt_rmdff.ys
index fffffb4b5..89cd3f0c8 100644
--- a/tests/various/opt_rmdff.ys
+++ b/tests/various/opt_rmdff.ys
@@ -2,12 +2,12 @@ read_verilog -icells opt_rmdff.v
 prep
 design -stash gold
 read_verilog -icells opt_rmdff.v
+proc
 opt_rmdff
 
 select -assert-count 0 c:remove*
 select -assert-min 7 c:keep*
 
-prep
 design -stash gate
 
 design -import gold -as gold