From: Ulrich Drepper <drepper@gmail.com>
Date: Tue, 15 Mar 2016 11:00:28 +0000 (+0000)
Subject: Update x86 register name documentation.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4bde3cdd707dfdf8b704c0776795b3733592e4b0;p=binutils-gdb.git

Update x86 register name documentation.

	* doc/c-i386.texi (Register Naming): Update to details of the
        latest architecture version.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index cbce6a5dc38..d67d7521c94 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2016-03-15  Ulrich Drepper  <drepper@gmail.com>
+
+	* doc/c-i386.texi (Register Naming): Update to details of the
+        latest architecture version.
+
 2016-03-10  Mickael Guene  <mickael.guene@st.com>
 
 	PR gas/19744
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 7d503495411..adbcb9946d0 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -663,8 +663,8 @@ the 6 section registers @samp{%cs} (code section), @samp{%ds}
 and @samp{%gs}.
 
 @item
-the 3 processor control registers @samp{%cr0}, @samp{%cr2}, and
-@samp{%cr3}.
+the 5 processor control registers @samp{%cr0}, @samp{%cr2},
+@samp{%cr3}, @samp{%cr4}, and @samp{%cr8}.
 
 @item
 the 6 debug registers @samp{%db0}, @samp{%db1}, @samp{%db2},
@@ -682,7 +682,7 @@ These registers are overloaded by 8 MMX registers @samp{%mm0},
 @samp{%mm6} and @samp{%mm7}.
 
 @item
-the 8 SSE registers registers @samp{%xmm0}, @samp{%xmm1}, @samp{%xmm2},
+the 8 128-bit SSE registers registers @samp{%xmm0}, @samp{%xmm1}, @samp{%xmm2},
 @samp{%xmm3}, @samp{%xmm4}, @samp{%xmm5}, @samp{%xmm6} and @samp{%xmm7}.
 @end itemize
 
@@ -699,13 +699,13 @@ pointer)
 the 8 extended registers @samp{%r8}--@samp{%r15}.
 
 @item
-the 8 32-bit low ends of the extended registers: @samp{%r8d}--@samp{%r15d}
+the 8 32-bit low ends of the extended registers: @samp{%r8d}--@samp{%r15d}.
 
 @item
-the 8 16-bit low ends of the extended registers: @samp{%r8w}--@samp{%r15w}
+the 8 16-bit low ends of the extended registers: @samp{%r8w}--@samp{%r15w}.
 
 @item
-the 8 8-bit low ends of the extended registers: @samp{%r8b}--@samp{%r15b}
+the 8 8-bit low ends of the extended registers: @samp{%r8b}--@samp{%r15b}.
 
 @item
 the 4 8-bit registers: @samp{%sil}, @samp{%dil}, @samp{%bpl}, @samp{%spl}.
@@ -714,7 +714,43 @@ the 4 8-bit registers: @samp{%sil}, @samp{%dil}, @samp{%bpl}, @samp{%spl}.
 the 8 debug registers: @samp{%db8}--@samp{%db15}.
 
 @item
-the 8 SSE registers: @samp{%xmm8}--@samp{%xmm15}.
+the 8 128-bit SSE registers: @samp{%xmm8}--@samp{%xmm15}.
+@end itemize
+
+With the AVX extensions more registers were made available:
+
+@itemize @bullet
+
+@item
+the 16 256-bit SSE @samp{%ymm0}--@samp{%ymm15} (only the first 8
+available in 32-bit mode).  The bottom 128 bits are overlaid with the
+@samp{xmm0}--@samp{xmm15} registers.
+
+@end itemize
+
+The AVX2 extensions made in 64-bit mode more registers available:
+
+@itemize @bullet
+
+@item
+the 16 128-bit registers @samp{%xmm16}--@samp{%xmm31} and the 16 256-bit
+registers @samp{%ymm16}--@samp{%ymm31}.
+
+@end itemize
+
+The AVX512 extensions added the following registers:
+
+@itemize @bullet
+
+@item
+the 32 512-bit registers @samp{%zmm0}--@samp{%zmm31} (only the first 8
+available in 32-bit mode).  The bottom 128 bits are overlaid with the
+@samp{%xmm0}--@samp{%xmm31} registers and the first 256 bits are
+overlaid with the @samp{%ymm0}--@samp{%ymm31} registers.
+
+@item
+the 8 mask registers @samp{%k0}--@samp{%k7}.
+
 @end itemize
 
 @node i386-Prefixes