From: Lauri Kasanen <cand@gmx.com>
Date: Fri, 21 May 2021 10:13:11 +0000 (+0300)
Subject: There were two code blocks with inverted min/max, prev commit missed one
X-Git-Tag: DRAFT_SVP64_0_1~892
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4c1a2a48135904bfa9e2d9b9c93c375e49c2a871;p=libreriscv.git

There were two code blocks with inverted min/max, prev commit missed one
---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 81d5b9aa9..ffee381ec 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -608,7 +608,7 @@ truncated.  Only then can the arithmetic saturation condition be detected:
        # unsigned add
        result = op_add(src1, src2, opwidth) # at max width
        # now saturate (unsigned)
-       sat = max(result, (1<<destwid)-1)
+       sat = min(result, (1<<destwid)-1)
        set_polymorphed_reg(rd, destwid, i, sat)
        # set sat overflow
        if Rc=1: