From: Connor Abbott Date: Mon, 16 Dec 2019 16:45:02 +0000 (+0100) Subject: freedreno: Use new macros for CP_WAIT_REG_MEM and CP_WAIT_MEM_GTE X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4c5ac156c36b697e3605a8143aafd332dd1a15e7;p=mesa.git freedreno: Use new macros for CP_WAIT_REG_MEM and CP_WAIT_MEM_GTE Similar to the existing usage for CP_COND_WRITE5, this makes it clear what each of the magic parameters are for. Reviewed-by: Kristian H. Kristensen Reviewed-by: Rob Clark Reviewed-by: Eric Anholt Part-of: --- diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c index caa1a54af14..d654f0bff9b 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.c +++ b/src/freedreno/vulkan/tu_cmd_buffer.c @@ -1116,18 +1116,19 @@ tu6_cache_flush(struct tu_cmd_buffer *cmd, struct tu_cs *cs) seqno = tu6_emit_event_write(cmd, cs, CACHE_FLUSH_AND_INV_EVENT, true); tu_cs_emit_pkt7(cs, CP_WAIT_REG_MEM, 6); - tu_cs_emit(cs, 0x00000013); + tu_cs_emit(cs, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) | + CP_WAIT_REG_MEM_0_POLL_MEMORY); tu_cs_emit_qw(cs, cmd->scratch_bo.iova); - tu_cs_emit(cs, seqno); - tu_cs_emit(cs, 0xffffffff); - tu_cs_emit(cs, 0x00000010); + tu_cs_emit(cs, CP_WAIT_REG_MEM_3_REF(seqno)); + tu_cs_emit(cs, CP_WAIT_REG_MEM_4_MASK(~0)); + tu_cs_emit(cs, CP_WAIT_REG_MEM_5_DELAY_LOOP_CYCLES(16)); seqno = tu6_emit_event_write(cmd, cs, CACHE_FLUSH_TS, true); tu_cs_emit_pkt7(cs, CP_WAIT_MEM_GTE, 4); - tu_cs_emit(cs, 0x00000000); + tu_cs_emit(cs, CP_WAIT_MEM_GTE_0_RESERVED(0)); tu_cs_emit_qw(cs, cmd->scratch_bo.iova); - tu_cs_emit(cs, seqno); + tu_cs_emit(cs, CP_WAIT_MEM_GTE_3_REF(seqno)); } static void diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c index 9e4cbf0a978..9b7c67f0fd3 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c @@ -1444,11 +1444,12 @@ fd6_framebuffer_barrier(struct fd_context *ctx) seqno = fd6_event_write(batch, ring, CACHE_FLUSH_AND_INV_EVENT, true); OUT_PKT7(ring, CP_WAIT_REG_MEM, 6); - OUT_RING(ring, 0x00000013); + OUT_RING(ring, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) | + CP_WAIT_REG_MEM_0_POLL_MEMORY); OUT_RELOC(ring, control_ptr(fd6_ctx, seqno)); - OUT_RING(ring, seqno); - OUT_RING(ring, 0xffffffff); - OUT_RING(ring, 0x00000010); + OUT_RING(ring, CP_WAIT_REG_MEM_3_REF(seqno)); + OUT_RING(ring, CP_WAIT_REG_MEM_4_MASK(~0)); + OUT_RING(ring, CP_WAIT_REG_MEM_5_DELAY_LOOP_CYCLES(16)); fd6_event_write(batch, ring, UNK_1D, true); fd6_event_write(batch, ring, UNK_1C, true); @@ -1458,9 +1459,9 @@ fd6_framebuffer_barrier(struct fd_context *ctx) fd6_event_write(batch, ring, 0x31, false); OUT_PKT7(ring, CP_WAIT_MEM_GTE, 4); - OUT_RING(ring, 0x00000000); + OUT_RING(ring, CP_WAIT_MEM_GTE_0_RESERVED(0)); OUT_RELOC(ring, control_ptr(fd6_ctx, seqno)); - OUT_RING(ring, seqno); + OUT_RING(ring, CP_WAIT_MEM_GTE_3_REF(seqno)); } void diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h index 8e2134aec36..f8193227651 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h @@ -178,18 +178,19 @@ fd6_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring) seqno = fd6_event_write(batch, ring, CACHE_FLUSH_AND_INV_EVENT, true); OUT_PKT7(ring, CP_WAIT_REG_MEM, 6); - OUT_RING(ring, 0x00000013); + OUT_RING(ring, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_EQ) | + CP_WAIT_REG_MEM_0_POLL_MEMORY); OUT_RELOC(ring, control_ptr(fd6_ctx, seqno)); - OUT_RING(ring, seqno); - OUT_RING(ring, 0xffffffff); - OUT_RING(ring, 0x00000010); + OUT_RING(ring, CP_WAIT_REG_MEM_3_REF(seqno)); + OUT_RING(ring, CP_WAIT_REG_MEM_4_MASK(~0)); + OUT_RING(ring, CP_WAIT_REG_MEM_5_DELAY_LOOP_CYCLES(16)); seqno = fd6_event_write(batch, ring, CACHE_FLUSH_TS, true); OUT_PKT7(ring, CP_WAIT_MEM_GTE, 4); - OUT_RING(ring, 0x00000000); + OUT_RING(ring, CP_WAIT_MEM_GTE_0_RESERVED(0)); OUT_RELOC(ring, control_ptr(fd6_ctx, seqno)); - OUT_RING(ring, seqno); + OUT_RING(ring, CP_WAIT_MEM_GTE_3_REF(seqno)); } static inline void