From: lkcl <lkcl@web>
Date: Sun, 8 May 2022 23:09:18 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2293
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4c7ba98f30a179cbdb9f7feacfd0d3eb4337fe99;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index c0cff4b7f..c61a03905 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -893,7 +893,8 @@ Vector Machines such as the CDC Star-100).
 
 Vertical-First allows *scalar* temporary registers to be utilised
 in the assessment as to whether a particular Vector element should
-be skipped, utilising a straight Branch instruction.  This technique
+be skipped, utilising a straight Branch instruction *(or ZOLC
+Conditions)*.  This technique
 is pioneered by Mitch Alsup and is a key feature of his VVM Extension
 to MyISA 66000.  Careful analysis of the registers within the
 Vertical-First Loop allows a Multi-Issue Out-of-Order Engine to