From: Carl Love Date: Wed, 27 Sep 2017 22:45:49 +0000 (+0000) Subject: rs6000-builtin.def (BU_FP_1MISC_1): Add define macro. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4ca4cf4e420cc817fc66949d4c8069f951d857b4;p=gcc.git rs6000-builtin.def (BU_FP_1MISC_1): Add define macro. gcc/ChangeLog: 2017-09-27 Carl Love * config/rs6000/rs6000-builtin.def (BU_FP_1MISC_1): Add define macro. (FCTID, FCTIW): Add BU_FP_MISC_1 macro expansion for builtins. * config/rs6000/rs6000.md (lrintsfsi2): Add define_insn for the fctiw instruction. gcc/testsuite/ChangeLog: 2017-09-27 Carl Love * gcc.target/powerpc/builtin-fctid-fctiw-runnable.c: New test file for the __builtin_fctid and __builtin_fctiw. From-SVN: r253238 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6f2e0acbbeb..737c4af15fc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2017-09-27 Carl Love + + * config/rs6000/rs6000-builtin.def (BU_FP_1MISC_1): Add define macro. + (FCTID, FCTIW): Add BU_FP_MISC_1 macro expansion for builtins. + * config/rs6000/rs6000.md (lrintsfsi2): Add define_insn for the + fctiw instruction. + 2017-09-27 Alexander Monakov * haifa-sched.c (autopref_rank_for_schedule): Order 'irrelevant' insns diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 151ac64e2aa..868b0cd14f6 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -608,6 +608,16 @@ CODE_FOR_ ## ICODE) /* ICODE */ +/* Miscellaneous builtins for instructions added prior to ISA 2.04. These + operate on floating point registers. */ +#define BU_FP_MISC_1(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_HARD_FLOAT, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + /* Miscellaneous builtins for instructions added in ISA 2.06. These instructions don't require either the DFP or VSX options, just the basic ISA 2.06 (popcntd) enablement since they operate on general purpose @@ -1863,6 +1873,10 @@ BU_VSX_OVERLOAD_X (XL, "xl") BU_VSX_OVERLOAD_X (XL_BE, "xl_be") BU_VSX_OVERLOAD_X (XST, "xst") +/* 1 argument builtins pre ISA 2.04. */ +BU_FP_MISC_1 (FCTID, "fctid", CONST, lrintdfdi2) +BU_FP_MISC_1 (FCTIW, "fctiw", CONST, lrintsfsi2) + /* 2 argument CMPB instructions added in ISA 2.05. */ BU_P6_2 (CMPB_32, "cmpb_32", CONST, cmpbsi3) BU_P6_64BIT_2 (CMPB, "cmpb", CONST, cmpbdi3) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 9b10e7fd44a..3181291a578 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5915,6 +5915,14 @@ [(set_attr "type" "fpload") (set_attr "length" "16")]) +(define_insn "lrintsfsi2" + [(set (match_operand:SI 0 "gpc_reg_operand" "=d") + (unspec:SI [(match_operand:DF 1 "gpc_reg_operand" "d")] + UNSPEC_FCTIW))] + "TARGET_SF_FPR && TARGET_FPRND" + "fctiw %0,%1" + [(set_attr "type" "fp")]) + ;; No VSX equivalent to fctid (define_insn "lrintdi2" [(set (match_operand:DI 0 "gpc_reg_operand" "=d") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9e67ac34e58..c1542b9a604 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-09-27 Carl Love + * gcc.target/powerpc/builtin-fctid-fctiw-runnable.c: New test file + for the __builtin_fctid and __builtin_fctiw. + 2017-09-27 Pekka Jääskeläinen * brig.dg/test/gimple/fbarrier.hsail: Fixed tests to match the new diff --git a/gcc/testsuite/gcc.target/powerpc/builtin-fctid-fctiw-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtin-fctid-fctiw-runnable.c new file mode 100644 index 00000000000..b99fae3e191 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/builtin-fctid-fctiw-runnable.c @@ -0,0 +1,137 @@ +/* { dg-do run { target { powerpc*-*-* && { lp64 && p8vector_hw } } } } */ +/* { dg-options "-mcpu=power8" } */ + +#ifdef DEBUG +#include +#endif + +void abort (void); + +long +test_bi_lrint_1 (float __A) +{ + return (__builtin_fctid (__A)); +} +long +test_bi_lrint_2 (double __A) +{ + return (__builtin_fctid (__A)); +} + +int +test_bi_rint_1 (float __A) +{ + return (__builtin_fctiw (__A)); +} + +int +test_bi_rint_2 (double __A) +{ + return (__builtin_fctiw (__A)); +} + + +int main( void) +{ + signed long lx, expected_l; + double dy; + + signed int x, expected_i; + float y; + + dy = 1.45; + expected_l = 1; + lx = __builtin_fctid (dy); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: __builtin_fctid(dy= %f) = %ld, expected %ld\n", + dy, lx, expected_l); +#else + abort(); +#endif + + dy = 3.51; + expected_l = 4; + lx = __builtin_fctid (dy); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: __builtin_fctid(dy= %f) = %ld, expected %ld\n", + dy, lx, expected_l); +#else + abort(); +#endif + + dy = 5.57; + expected_i = 6; + x = __builtin_fctiw (dy); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: __builtin_fctiw(dy= %f) = %d, expected %d\n", + dy, x, expected_i); +#else + abort(); +#endif + + y = 11.47; + expected_i = 11; + x = __builtin_fctiw (y); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: __builtin_fctiw(y = %f) = %d, expected %d\n", + y, x, expected_i); +#else + abort(); +#endif + + y = 17.77; + expected_l = 18; + lx = test_bi_lrint_1 (y); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: function call test_bi_lrint_1 (y = %f) = %ld, expected %ld\n", + y, lx, expected_l); +#else + abort(); +#endif + + dy = 7.1; + expected_l = 7; + lx = test_bi_lrint_2 (dy); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: function call test_bi_lrint_2 (dy = %f) = %ld, expected %ld\n", + dy, lx, expected_l); +#else + abort(); +#endif + + y = 0.001; + expected_i = 0; + x = test_bi_rint_1 (y); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: function call test_bi_rint_1 (y = %f) = %d, expected %d\n", + y, x, expected_i); +#else + abort(); +#endif + + dy = 0.9999; + expected_i = 1; + x = test_bi_rint_2 (dy); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: function call test_bi_rint_2 (dy = %f) = %d, expected %d\n", + dy, x, expected_i); +#else + abort(); +#endif +}