From: colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 <colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0@web>
Date: Tue, 22 Sep 2020 01:28:03 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2124
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4cefcca45b63deea6a208ca78ea46f61e552ef6c;p=libreriscv.git

---

diff --git a/cole.mdwn b/cole.mdwn
index 8a35b67d4..9e90ed46b 100644
--- a/cole.mdwn
+++ b/cole.mdwn
@@ -43,6 +43,10 @@ move things along from one stage to the next
 
 ## Completed but not yet submitted
 
+## Submitted for NLNet RFP
+
+submitted but not confirmed paid:
+
 - <https://bugs.libre-soc.org/show_bug.cgi?id=401> Convert 180nm Test ASIC Mem Layout diagram to SVG
   - EUR 150
 
@@ -63,11 +67,6 @@ move things along from one stage to the next
 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> Virtual Regfile port
   - EUR 200. shared, lkcl (50%, EUR 100), cole (50%, EUR 100)
 
-
-## Submitted for NLNet RFP
-
-submitted but not confirmed paid:
-
 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 
 ## Paid