From: Jeff Law <law@gcc.gnu.org>
Date: Thu, 21 Jan 1993 16:34:59 +0000 (-0700)
Subject: * pa.c (emit_move_sequence): Handle secondary reloads for SAR.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4d3cea21c7753c244069178c956b5fa8bec73bc6;p=gcc.git

* pa.c (emit_move_sequence): Handle secondary reloads for SAR.

From-SVN: r3298
---

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 40610b30644..98848f34d8a 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -528,6 +528,8 @@ emit_move_sequence (operands, mode, scratch_reg)
   register rtx operand0 = operands[0];
   register rtx operand1 = operands[1];
 
+  /* Handle secondary reloads for loads/stores of FP registers from
+     REG+D addresses where D does not fit in 5 bits.  */
   if (fp_reg_operand (operand0, mode)
       && GET_CODE (operand1) == MEM
       && !short_memory_operand  (operand1, mode)
@@ -548,6 +550,19 @@ emit_move_sequence (operands, mode, scratch_reg)
 			  operand1));
       return 1;
     }
+  /* Handle secondary reloads for SAR.  These occur when trying to load
+     the SAR from memory or from a FP register.  */
+  else if (GET_CODE (operand0) == REG
+	   && REGNO_REG_CLASS (REGNO (operand0)) == SHIFT_REGS
+	   && (GET_CODE (operand1) == MEM
+	       || (GET_CODE (operand1) == REG
+		   && FP_REG_CLASS_P (REGNO_REG_CLASS (REGNO (operand1)))))
+	   && scratch_reg)
+    {
+      emit_move_insn (scratch_reg, operand1);
+      emit_move_insn (operand0, scratch_reg);
+      return 1;
+    }
   /* Handle most common case: storing into a register.  */
   else if (register_operand (operand0, mode))
     {