From: Tom Stellard <thomas.stellard@amd.com>
Date: Mon, 30 Apr 2012 20:11:27 +0000 (-0400)
Subject: r600g/llvm: Fix handling of MASK_WRITE instructions
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4da1fcacf1d78c5fcae9e81eaf2a9d7c8117af3e;p=mesa.git

r600g/llvm: Fix handling of MASK_WRITE instructions

We can't delete MASK_WRITE instructions from the program, because this
will cause instructions being masked by MASK_WRITE to be marked dead and
then deleted in the dce pass.
---

diff --git a/src/gallium/drivers/radeon/AMDGPUUtil.cpp b/src/gallium/drivers/radeon/AMDGPUUtil.cpp
index a5045436ab4..6fb01b687f3 100644
--- a/src/gallium/drivers/radeon/AMDGPUUtil.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUUtil.cpp
@@ -34,6 +34,7 @@ bool llvm::isPlaceHolderOpcode(unsigned opcode)
   case AMDIL::RETURN:
   case AMDIL::LOAD_INPUT:
   case AMDIL::LAST:
+  case AMDIL::MASK_WRITE:
   case AMDIL::RESERVE_REG:
     return true;
   }
diff --git a/src/gallium/drivers/radeon/R600LowerInstructions.cpp b/src/gallium/drivers/radeon/R600LowerInstructions.cpp
index fb5431d0eef..8395d22c4ad 100644
--- a/src/gallium/drivers/radeon/R600LowerInstructions.cpp
+++ b/src/gallium/drivers/radeon/R600LowerInstructions.cpp
@@ -311,7 +311,8 @@ bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF)
         MachineInstr * defInstr = MRI->getVRegDef(maskedRegister);
         MachineOperand * def = defInstr->findRegisterDefOperand(maskedRegister);
         def->addTargetFlag(MO_FLAG_MASK);
-        break;
+        /* Continue so the instruction is not erased */
+        continue;
       }
 
       case AMDIL::NEGATE_i32: