From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 3 Jun 2019 16:33:42 +0000 (-0700)
Subject: Ooopsie
X-Git-Tag: working-ls180~1208^2~219
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4da25c76b365b7c90a368c36def81d1122434b95;p=yosys.git

Ooopsie
---

diff --git a/techlibs/ice40/cells_map.v b/techlibs/ice40/cells_map.v
index 287c48b11..759549e30 100644
--- a/techlibs/ice40/cells_map.v
+++ b/techlibs/ice40/cells_map.v
@@ -53,7 +53,7 @@ module \$lut (A, Y);
     end else
     if (WIDTH == 4) begin
       localparam [15:0] INIT = {LUT[15], LUT[7], LUT[11], LUT[3], LUT[13], LUT[5], LUT[9], LUT[1], LUT[14], LUT[6], LUT[10], LUT[2], LUT[12], LUT[4], LUT[8], LUT[0]};
-      SB_LUT4 #(.LUT_INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
+      SB_LUT4 #(.LUT_INIT(INIT)) _TECHMAP_REPLACE_ (.O(Y),
         .I0(A[3]), .I1(A[2]), .I2(A[1]), .I3(A[0]));
     end else begin
       wire _TECHMAP_FAIL_ = 1;