From: lkcl <lkcl@web>
Date: Mon, 1 May 2023 11:41:37 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4da8595f5c4299d28383fa2abb1f7003c29fd5b6;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index ff8ef7ed9..c06fc55bf 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -483,6 +483,17 @@ outer loop. Rc=1 with Sub-Vectors (SUBVL=2,3,4) is `UNDEFINED` behaviour.
 will clearly result in data corruption.  It may be best to perform
 a Pack/Unpack Transposing copy of the data first*
 
+### Parallel Prefix Sum
+
+This is a work-efficient Parallel Schedule that for example produces Trangular
+or Fibonacci number sequences. Half of the Prefix Sum Schedule is near-identical
+to Parallel Reduction.  Whilst the Arithmetic mapreduce Mode may achieve the same
+end-result, implementations may only implement Mapreduce in serial form (or give
+the appearance to Programmers of the same). The Parallel Prefix Schedule is
+*required* to be implemented in such a way that its Deterministic Schedule may be
+parallelised. Like the Reduction Schedule it is 100% Deterministic and consequently
+may be used with non-commutative operations.
+
 ## Determining Register Hazards
 
 For high-performance (Multi-Issue, Out-of-Order) systems it is critical