From: Michael Meissner <meissner@linux.ibm.com>
Date: Wed, 10 Jul 2019 19:34:03 +0000 (+0000)
Subject: predicates.md (cint34_operand): Update SIGNED_34BIT_OFFSET_P call.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4ded6adc51bbcf3d4b6f43a91c76b0628815a8cd;p=gcc.git

predicates.md (cint34_operand): Update SIGNED_34BIT_OFFSET_P call.

2019-07-10  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/predicates.md (cint34_operand): Update
	SIGNED_34BIT_OFFSET_P call.
	(pcrel_address): Update SIGNED_34BIT_OFFSET_P call.
	(pcrel_external_address): Update SIGNED_34BIT_OFFSET_P call.
	* config/rs6000/rs6000.c (rs6000_prefixed_address): Update
	SIGNED_16BIT_OFFSET_P and SIGNED_34BIT_OFFSET_P calls.
	* config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): Remove EXTRA
	argument.
	(SIGNED_34BIT_OFFSET_P): Remove EXTRA argument.
	(SIGNED_16BIT_OFFSET_EXTRA_P): New macro, like
	SIGNED_16BIT_OFFSET_P with an EXTRA argument.
	(SIGNED_34BIT_OFFSET_EXTRA_P): New macro, like
	SIGNED_34BIT_OFFSET_P with an EXTRA argument.

From-SVN: r273370
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5d3c8d42401..e5c05e5e88d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+2019-07-10  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/predicates.md (cint34_operand): Update
+	SIGNED_34BIT_OFFSET_P call.
+	(pcrel_address): Update SIGNED_34BIT_OFFSET_P call.
+	(pcrel_external_address): Update SIGNED_34BIT_OFFSET_P call.
+	* config/rs6000/rs6000.c (rs6000_prefixed_address): Update
+	SIGNED_16BIT_OFFSET_P and SIGNED_34BIT_OFFSET_P calls.
+	* config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): Remove EXTRA
+	argument.
+	(SIGNED_34BIT_OFFSET_P): Remove EXTRA argument.
+	(SIGNED_16BIT_OFFSET_EXTRA_P): New macro, like
+	SIGNED_16BIT_OFFSET_P with an EXTRA argument.
+	(SIGNED_34BIT_OFFSET_EXTRA_P): New macro, like
+	SIGNED_34BIT_OFFSET_P with an EXTRA argument.
+
 2019-07-10  Iain Sandoe  <iain@sandoe.co.uk>
 
 	* config/rs6000/darwin.h (LIB_SPEC): Collate this spec here.
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 45fa40a4045..e64f772de02 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -309,7 +309,7 @@
   if (!TARGET_PREFIXED_ADDR)
     return 0;
 
-  return SIGNED_34BIT_OFFSET_P (INTVAL (op), 0);
+  return SIGNED_34BIT_OFFSET_P (INTVAL (op));
 })
 
 ;; Return 1 if op is a register that is not special.
@@ -1638,7 +1638,7 @@
       rtx op0 = XEXP (op, 0);
       rtx op1 = XEXP (op, 1);
 
-      if (!CONST_INT_P (op1) || !SIGNED_34BIT_OFFSET_P (INTVAL (op1), 0))
+      if (!CONST_INT_P (op1) || !SIGNED_34BIT_OFFSET_P (INTVAL (op1)))
 	return false;
 
       op = op0;
@@ -1673,7 +1673,7 @@
       rtx op0 = XEXP (op, 0);
       rtx op1 = XEXP (op, 1);
 
-      if (!CONST_INT_P (op1) || !SIGNED_34BIT_OFFSET_P (INTVAL (op1), 0))
+      if (!CONST_INT_P (op1) || !SIGNED_34BIT_OFFSET_P (INTVAL (op1)))
 	return false;
 
       op = op0;
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index ccc9d764382..39fa6ec382b 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -21523,11 +21523,11 @@ rs6000_prefixed_address (rtx addr, machine_mode mode)
 	return false;
 
       HOST_WIDE_INT value = INTVAL (op1);
-      if (!SIGNED_34BIT_OFFSET_P (value, 0))
+      if (!SIGNED_34BIT_OFFSET_P (value))
 	return false;
 
       /* Offset larger than 16-bits?  */
-      if (!SIGNED_16BIT_OFFSET_P (value, 0))
+      if (!SIGNED_16BIT_OFFSET_P (value))
 	return true;
 
       /* DQ instruction (bottom 4 bits must be 0) for vectors.  */
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 9193d9e8a54..5f3b9edd388 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2526,16 +2526,27 @@ typedef struct GTY(()) machine_function
 #pragma GCC poison TARGET_FLOAT128 OPTION_MASK_FLOAT128 MASK_FLOAT128
 #endif
 
-/* Whether a given VALUE is a valid 16- or 34-bit signed offset.  EXTRA is the
-   amount that we can't touch at the high end of the range (typically if the
-   address is split into smaller addresses, the extra covers the addresses
-   which might be generated when the insn is split).  */
-#define SIGNED_16BIT_OFFSET_P(VALUE, EXTRA)				\
-  IN_RANGE (VALUE,							\
+/* Whether a given VALUE is a valid 16 or 34-bit signed offset.  */
+#define SIGNED_16BIT_OFFSET_P(VALUE)					\
+  IN_RANGE ((VALUE),							\
+	    -(HOST_WIDE_INT_1 << 15),					\
+	    (HOST_WIDE_INT_1 << 15) - 1)
+
+#define SIGNED_34BIT_OFFSET_P(VALUE)					\
+  IN_RANGE ((VALUE),							\
+	    -(HOST_WIDE_INT_1 << 33),					\
+	    (HOST_WIDE_INT_1 << 33) - 1)
+
+/* Like SIGNED_16BIT_OFFSET_P and SIGNED_34BIT_OFFSET_P, but with an extra
+   argument that gives a length to validate a range of addresses, to allow for
+   splitting insns into several insns, each of which has an offsettable
+   address.  */
+#define SIGNED_16BIT_OFFSET_EXTRA_P(VALUE, EXTRA)			\
+  IN_RANGE ((VALUE),							\
 	    -(HOST_WIDE_INT_1 << 15),					\
 	    (HOST_WIDE_INT_1 << 15) - 1 - (EXTRA))
 
-#define SIGNED_34BIT_OFFSET_P(VALUE, EXTRA)				\
-  IN_RANGE (VALUE,							\
+#define SIGNED_34BIT_OFFSET_EXTRA_P(VALUE, EXTRA)			\
+  IN_RANGE ((VALUE),							\
 	    -(HOST_WIDE_INT_1 << 33),					\
 	    (HOST_WIDE_INT_1 << 33) - 1 - (EXTRA))