From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 1 Nov 2018 06:16:57 +0000 (+0000)
Subject: working on sv fld elwidth variant
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4df3e4ce35e801eae4bf56a24b2c0218750b42ba;p=riscv-tests.git

working on sv fld elwidth variant
---

diff --git a/isa/rv64uf/sv_fld_elwidth.S b/isa/rv64uf/sv_fld_elwidth.S
index 1612065..85f5987 100644
--- a/isa/rv64uf/sv_fld_elwidth.S
+++ b/isa/rv64uf/sv_fld_elwidth.S
@@ -42,13 +42,10 @@ RVTEST_RV64UF        # Define TVM used by program.
 RVTEST_CODE_BEGIN   # Start of test code.
 
         SV_ELWIDTH_TEST( fld , 2, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer1 )
+        SV_ELWIDTH_TEST( fld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer2 )
+        SV_ELWIDTH_TEST( fld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata3, answer3)
+        SV_ELWIDTH_TEST( fld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
 /*
-        SV_ELWIDTH_TEST(  ld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1,
-                0x8979695949392919,  0x8777675747372717,  0x8676665646362616 )
-        SV_ELWIDTH_TEST(  ld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata1,
-                0x0000000000002919,  0x0000000000004939,  0x0000000000006959 )
-        SV_ELWIDTH_TEST(  ld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata1,
-                0x0000493900002919,  0xffff897900006959,  0xa5a5a5a500002717 )
         SV_ELWIDTH_TEST(  ld , 5, 8, SV_W_32BIT, SV_W_16BIT, testdata1,
                 0x6757271769592919,  0xa5a5a5a5a5a52616,  0xa5a5a5a5a5a5a5a5 )
         SV_ELWIDTH_TEST(  ld , 7, 8, SV_W_16BIT, SV_W_8BIT, testdata1,
@@ -78,6 +75,36 @@ answer1:
         .dword 0x8777675747372717
         .dword 0xa5a5a5a5a5a5a5a5
 
+answer2:
+
+        .dword 0x8979695949392919
+        .dword 0x8777675747372717
+        .dword 0x8676665646362616
+
+testdata3:
+        .dword 0x63d03c0051805140
+        .dword 0x000000000000E480
+        .dword 0x8676665646362616
+        .dword 0x8272625242322212
+        .dword 0x8171615141312111
+        .dword 0x8373635343332313
+
+answer3:
+
+        .double 42.0
+        .double 44.0
+        .double 1.0
+
+answer4:
+
+        .float 42.0
+        .float 44.0
+        .float -1152.0
+        .float 1.0
+        .dword 0x00000000a5a5a5a5
+        .float 1000.0
+        .float 0.0
+
 # Output data section.
 RVTEST_DATA_BEGIN   # Start of test output data region.
         .align 3