From: Bin Cheng <bin.cheng@arm.com>
Date: Thu, 11 Jan 2018 15:41:41 +0000 (+0000)
Subject: re PR tree-optimization/83695 (ICE on valid code at -O3: Segmentation fault)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4e090bcc53ab54831a180f4ee57f5e5de82a0d56;p=gcc.git

re PR tree-optimization/83695 (ICE on valid code at -O3: Segmentation fault)

	PR tree-optimization/83695
	* gimple-loop-linterchange.cc
	(tree_loop_interchange::interchange_loops): Call scev_reset_htab to
	reset cached scev information after interchange.
	(pass_linterchange::execute): Remove call to scev_reset_htab.

	gcc/testsuite
	PR tree-optimization/83695
	* gcc.dg/tree-ssa/pr83695.c: New test.

From-SVN: r256541
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a23405a744d..878d72c2239 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2018-01-11  Bin Cheng  <bin.cheng@arm.com>
+
+	PR tree-optimization/83695
+	* gimple-loop-linterchange.cc
+	(tree_loop_interchange::interchange_loops): Call scev_reset_htab to
+	reset cached scev information after interchange.
+	(pass_linterchange::execute): Remove call to scev_reset_htab.
+
 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
 	* config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
diff --git a/gcc/gimple-loop-interchange.cc b/gcc/gimple-loop-interchange.cc
index 01a26c07c42..eb35263e69c 100644
--- a/gcc/gimple-loop-interchange.cc
+++ b/gcc/gimple-loop-interchange.cc
@@ -1119,6 +1119,10 @@ tree_loop_interchange::interchange_loops (loop_cand &iloop, loop_cand &oloop)
   oloop.m_loop->any_likely_upper_bound = false;
   free_numbers_of_iterations_estimates (oloop.m_loop);
 
+  /* Clear all cached scev information.  This is expensive but shouldn't be
+     a problem given we interchange in very limited times.  */
+  scev_reset_htab ();
+
   /* ???  The association between the loop data structure and the
      CFG changed, so what was loop N at the source level is now
      loop M.  We should think of retaining the association or breaking
@@ -2070,9 +2074,6 @@ pass_linterchange::execute (function *fun)
       loop_nest.release ();
     }
 
-  if (changed_p)
-    scev_reset_htab ();
-
   return changed_p ? (TODO_update_ssa_only_virtuals) : 0;
 }
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b3d2fcbc124..7681b0eb78d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-11  Bin Cheng  <bin.cheng@arm.com>
+
+	PR tree-optimization/83695
+	* gcc.dg/tree-ssa/pr83695.c: New test.
+
 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
 	* gcc.target/arm/simd/fp16fml_lane_high.c: New test.
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr83695.c b/gcc/testsuite/gcc.dg/tree-ssa/pr83695.c
new file mode 100644
index 00000000000..af56a313f40
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr83695.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+int a[3][3][3], b, d;
+short c;
+unsigned char e;
+
+static void f ()
+{
+  for (c = 0; c < 2; c++)
+      for (e = 0; e < 3; e++)
+        for (b = 0; b < 3; b++)
+          a[b][e][b] = 0;
+  while (1)
+    ;
+}
+
+int main ()
+{
+  if (d)
+    f ();
+  return 0;
+}