From: Segher Boessenkool Date: Sat, 15 Jun 2019 00:25:18 +0000 (+0200) Subject: rs6000: New iterator CCEITHER X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4e20bd42bc04959c4b2f845352046fcfd5313484;p=gcc.git rs6000: New iterator CCEITHER This expands to both CC and CCUNS, it's useful for isel for example. * config/rs6000/rs6000.md (CCEITHER): New define_mode_iterator. (un): New define_mode_attr. (isel_signed_, isel_unsigned_): Delete, merge into ... (isel_signed_): ... this. New define_insn. (isel_reversed_signed_, isel_reversed_unsigned_): Delete, merge into ... (isel_reversed_signed_): ... this. New define_insn. From-SVN: r272319 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 95b87a6a0bc..21b8e905eeb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2019-06-14 Segher Boessenkool + + * config/rs6000/rs6000.md (CCEITHER): New define_mode_iterator. + (un): New define_mode_attr. + (isel_signed_, isel_unsigned_): Delete, merge into ... + (isel_signed_): ... this. New define_insn. + (isel_reversed_signed_, isel_reversed_unsigned_): Delete, + merge into ... + (isel_reversed_signed_): ... this. New define_insn. + 2019-06-14 Iain Sandoe * config/darwin.opt: Add RejectNegative where needed, reorder diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index b1f3bc3aac0..eb03e4d4c1e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5055,23 +5055,13 @@ ;; leave out the mode in operand 4 and use one pattern, but reload can ;; change the mode underneath our feet and then gets confused trying ;; to reload the value. -(define_insn "isel_signed_" +(define_mode_iterator CCEITHER [CC CCUNS]) +(define_mode_attr un [(CC "") (CCUNS "un")]) +(define_insn "isel_signed_" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") (if_then_else:GPR (match_operator 1 "scc_comparison_operator" - [(match_operand:CC 4 "cc_reg_operand" "y,y") - (const_int 0)]) - (match_operand:GPR 2 "reg_or_zero_operand" "O,b") - (match_operand:GPR 3 "gpc_reg_operand" "r,r")))] - "TARGET_ISEL" - "isel %0,%2,%3,%j1" - [(set_attr "type" "isel")]) - -(define_insn "isel_unsigned_" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") - (if_then_else:GPR - (match_operator 1 "scc_comparison_operator" - [(match_operand:CCUNS 4 "cc_reg_operand" "y,y") + [(match_operand:CCEITHER 4 "cc_reg_operand" "y,y") (const_int 0)]) (match_operand:GPR 2 "reg_or_zero_operand" "O,b") (match_operand:GPR 3 "gpc_reg_operand" "r,r")))] @@ -5083,26 +5073,11 @@ ;; isel can handle reversed comparisons so long as the operands are ;; registers. -(define_insn "*isel_reversed_signed_" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") - (if_then_else:GPR - (match_operator 1 "scc_rev_comparison_operator" - [(match_operand:CC 4 "cc_reg_operand" "y,y") - (const_int 0)]) - (match_operand:GPR 2 "gpc_reg_operand" "r,r") - (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))] - "TARGET_ISEL" -{ - PUT_CODE (operands[1], reverse_condition (GET_CODE (operands[1]))); - return "isel %0,%3,%2,%j1"; -} - [(set_attr "type" "isel")]) - -(define_insn "*isel_reversed_unsigned_" +(define_insn "*isel_reversed_signed_" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") (if_then_else:GPR (match_operator 1 "scc_rev_comparison_operator" - [(match_operand:CCUNS 4 "cc_reg_operand" "y,y") + [(match_operand:CCEITHER 4 "cc_reg_operand" "y,y") (const_int 0)]) (match_operand:GPR 2 "gpc_reg_operand" "r,r") (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))]