From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 20 Jun 2019 17:47:20 +0000 (-0700)
Subject: Handle COs driven by 1'bx
X-Git-Tag: working-ls180~1237^2~82
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4e5836a5fb009751a6f3bd7ec3eba20e223861f1;p=yosys.git

Handle COs driven by 1'bx
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 12b23cfe9..42f54209b 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -355,10 +355,16 @@ struct XAigerWriter
 						}
 
 						int offset = 0;
-						for (const auto &b : rhs.bits()) {
+						for (auto b : rhs.bits()) {
 							SigBit I = sigmap(b);
-							if (I != b)
-								alias_map[b] = I;
+							if (b == RTLIL::Sx)
+								b = RTLIL::S0;
+							else if (I != b) {
+								if (I == RTLIL::Sx)
+									alias_map[b] = RTLIL::S0;
+								else
+									alias_map[b] = I;
+							}
 							co_bits.emplace_back(b, cell, port_name, offset++, 0);
 							unused_bits.erase(b);
 						}