From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 21 Nov 2023 12:28:24 +0000 (+0000)
Subject: Added brackets for fixedstoreshift.mdwm file
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4e7d22425f12ecf0c02b6bc7f20f756df472ce42;p=openpower-isa.git

Added brackets for fixedstoreshift.mdwm file
---

diff --git a/openpower/isa/fixedstoreshift.mdwn b/openpower/isa/fixedstoreshift.mdwn
index 3b04b75c..b2a0574b 100644
--- a/openpower/isa/fixedstoreshift.mdwn
+++ b/openpower/isa/fixedstoreshift.mdwn
@@ -23,7 +23,7 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) << (SH+1)
+    EA <- b + ((RB) << (SH+1))
     MEM(EA, 1) <- (RS)[XLEN-8:XLEN-1]
 
 Description:
@@ -45,7 +45,7 @@ X-Form
 
 Pseudo-code:
 
-    EA <- (RA) + (RB) << (SH+1)
+    EA <- (RA) + ((RB) << (SH+1))
     MEM(EA, 1) <- (RS)[XLEN-8:XLEN-1]
     RA <- EA
 
@@ -73,7 +73,7 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) << (SH+1)
+    EA <- b + ((RB) << (SH+1))
     MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]
 
 Description:
@@ -95,7 +95,7 @@ X-Form
 
 Pseudo-code:
 
-    EA <- (RA) + (RB) << (SH+1)
+    EA <- (RA) + ((RB) << (SH+1))
     MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]
     RA <- EA
 
@@ -123,7 +123,7 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) << (SH+1)
+    EA <- b + ((RB) << (SH+1))
     MEM(EA, 4) <- (RS)[XLEN-32:XLEN-1]
 
 Description:
@@ -145,7 +145,7 @@ X-Form
 
 Pseudo-code:
 
-    EA <- (RA) + (RB) << (SH+1)
+    EA <- (RA) + ((RB) << (SH+1))
     MEM(EA, 4) <- (RS)[XLEN-32:XLEN-1]
     RA <- EA
 
@@ -177,7 +177,7 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) << (SH+1)
+    EA <- b + ((RB) << (SH+1))
     MEM(EA, 8) <- (RS)
 
 Description:
@@ -230,7 +230,7 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) << (SH+1)
+    EA <- b + ((RB) << (SH+1))
     MEM(EA, 2) <- (RS) [56:63] || (RS)[48:55]
 
 Description:
@@ -255,7 +255,7 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) << (SH+1)
+    EA <- b + ((RB) << (SH+1))
     MEM(EA, 4) <- ((RS)[56:63] || (RS)[48:55] || (RS)[40:47]
                    ||(RS)[32:39])
 
@@ -286,7 +286,7 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) << (SH+1)
+    EA <- b + ((RB) << (SH+1))
     MEM(EA, 8) <- ((RS) [56:63] || (RS)[48:55]
                     || (RS)[40:47] || (RS)[32:39]
                     || (RS)[24:31] || (RS)[16:23]