From: Nicolai Hähnle <nicolai.haehnle@amd.com>
Date: Tue, 9 Feb 2016 18:02:34 +0000 (-0500)
Subject: gallivm: special case TGSI_OPCODE_STORE
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4eb416bd9d670f55fe9691bcd75950f728a0b782;p=mesa.git

gallivm: special case TGSI_OPCODE_STORE

This instruction has the resource (buffer or image) as a destination to
represent the writemask for SSBO writes. However, this is obviously not
a "real" destination for the purpose of emitting LLVM IR.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
---

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index 1cbe47ca91f..614c6558ede 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
@@ -315,7 +315,7 @@ lp_build_tgsi_inst_llvm(
       }
    }
 
-   if (info->num_dst > 0) {
+   if (info->num_dst > 0 && info->opcode != TGSI_OPCODE_STORE) {
       bld_base->emit_store(bld_base, inst, info, emit_data.output);
    }
    return TRUE;