From: Zhenqiang Chen <zhenqiang.chen@arm.com>
Date: Wed, 24 Sep 2014 07:00:55 +0000 (+0000)
Subject: re PR rtl-optimization/63210 (ira does not select the best register compared with... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4ef20c29a3e67224a3311ef4f620b815d4fceaeb;p=gcc.git

re PR rtl-optimization/63210 (ira does not select the best register compared with gcc 4.8 for ARM THUMB1)

ChangeLog:
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	PR rtl-optimization/63210
	* ira-color.c (assign_hard_reg): Ignore conflict cost if the
	HARD_REGNO is not availabe for CONFLICT_A.

testsuite/ChangeLog:
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* gcc.target/arm/pr63210.c: New test.

From-SVN: r215540
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a0de60bbc53..10dbc523fb4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>
+
+	PR rtl-optimization/63210
+	* ira-color.c (assign_hard_reg): Ignore conflict cost if the
+	HARD_REGNO is not available for CONFLICT_A.
+
 2014-09-23  Andi Kleen  <ak@linux.intel.com>
 
 	* cgraph.h (symtab_node): Add no_reorder attribute.
diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index 1042eaab48f..841d0d155a9 100644
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -1709,6 +1709,7 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
         {
 	  ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
 	  enum reg_class conflict_aclass;
+	  allocno_color_data_t data = ALLOCNO_COLOR_DATA (conflict_a);
 
 	  /* Reload can give another class so we need to check all
 	     allocnos.  */
@@ -1780,7 +1781,12 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
 		    hard_regno = ira_class_hard_regs[aclass][j];
 		    ira_assert (hard_regno >= 0);
 		    k = ira_class_hard_reg_index[conflict_aclass][hard_regno];
-		    if (k < 0)
+		    if (k < 0
+			   /* If HARD_REGNO is not available for CONFLICT_A,
+			      the conflict would be ignored, since HARD_REGNO
+			      will never be assigned to CONFLICT_A.  */
+			|| !TEST_HARD_REG_BIT (data->profitable_hard_regs,
+					       hard_regno))
 		      continue;
 		    full_costs[j] -= conflict_costs[k];
 		  }
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2fb28b9f4c0..a3f51b36d7e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>
+
+	* gcc.target/arm/pr63210.c: New test.
+
 2014-09-23  Andi Kleen  <ak@linux.intel.com>
 
 	* gcc.dg/noreorder.c: New test.
diff --git a/gcc/testsuite/gcc.target/arm/pr63210.c b/gcc/testsuite/gcc.target/arm/pr63210.c
new file mode 100644
index 00000000000..c3ae92801f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr63210.c
@@ -0,0 +1,12 @@
+/* { dg-do assemble } */
+/* { dg-options "-mthumb -Os " }  */
+/* { dg-require-effective-target arm_thumb1_ok } */
+
+int foo1 (int c);
+int foo2 (int c);
+
+int test (int c)
+{
+  return (foo1 (c) || foo2 (c));
+}
+/* { dg-final { object-size text <= 28 } } */