From: Tim Newsome <tim@sifive.com>
Date: Wed, 16 Mar 2016 18:02:52 +0000 (-0700)
Subject: Test 'info registers all' as well as 'info all-registers'
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4efefcf5fe74e15409f3ea65b6645e46ebc7c39b;p=riscv-isa-sim.git

Test 'info registers all' as well as 'info all-registers'
---

diff --git a/tests/gdbserver-smoke.py b/tests/gdbserver-smoke.py
index 51e8cc9..16af626 100755
--- a/tests/gdbserver-smoke.py
+++ b/tests/gdbserver-smoke.py
@@ -45,10 +45,12 @@ class DebugTest(unittest.TestCase):
         self.assertIn("Remote connection closed", output)
 
     def test_registers(self):
-        output = self.gdb.command("info all-registers")
-        self.assertNotIn("Could not", output)
-        for reg in ('zero', 'ra', 'sp', 'gp', 'tp'):
-            self.assertIn(reg, output)
+        # Try both forms to test gdb.
+        for cmd in ("info all-registers", "info registers all"):
+            output = self.gdb.command(cmd)
+            self.assertNotIn("Could not", output)
+            for reg in ('zero', 'ra', 'sp', 'gp', 'tp'):
+                self.assertIn(reg, output)
         # mcpuid is one of the few registers that should have the high bit set
         # (for rv64).
         self.assertRegexpMatches(output, ".*mcpuid *0x80")