From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 26 Jun 2019 15:51:11 +0000 (-0700)
Subject: Merge pull request #1136 from YosysHQ/xaig_ice40_wire_del
X-Git-Tag: working-ls180~1237^2~32^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4f0cb3449573acb189e877407d7b19a5d140c9e7;p=yosys.git

Merge pull request #1136 from YosysHQ/xaig_ice40_wire_del

abc9: Add wire delays to synth_ice40
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4f0cb3449573acb189e877407d7b19a5d140c9e7