From: Kajol Jain <kajoljain797@gmail.com>
Date: Wed, 12 Jun 2019 05:57:45 +0000 (+0530)
Subject: arch-power: Added function to set HSSR1 register
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4f5bbbc844d3214925192051c20f7b6832463f05;p=gem5.git

arch-power: Added function to set HSSR1 register

Change-Id: Ie7f44b4f901d22bf877b5c066a9f9042effb793c
Signed-off-by: Kajol Jain <kajoljain797@gmail.com>
---

diff --git a/src/arch/power/faults.hh b/src/arch/power/faults.hh
index 24844239c..fc021edf6 100644
--- a/src/arch/power/faults.hh
+++ b/src/arch/power/faults.hh
@@ -135,6 +135,14 @@ class PowerInterrupt : public PowerFaultBase
       uint64_t srr1 = ((msr & unsetMask(31, 27)) & unsetMask(22,16)) | BitMask;
       tc->setIntReg(INTREG_SRR1, srr1);
     }
+
+    virtual void updateHSRR1(ThreadContext *tc, uint64_t BitMask=0x0000000)
+    {
+      Msr msr = tc->readIntReg(INTREG_MSR);
+      uint64_t hsrr1 = ((msr & unsetMask(31, 27)) & unsetMask(22,16)) |
+                                                    BitMask;
+      tc->setIntReg(INTREG_HSRR1, hsrr1);
+    }
 };
 
 //SRR1 value is correctly set by the entity raising