From: Thiemo Seufer Date: Wed, 25 Apr 2007 12:05:48 +0000 (+0000) Subject: mips.opt (mdmx, [...]): New options. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=500fc425860f86c0c9f38ea6a2a3f5b32e8549c2;p=gcc.git mips.opt (mdmx, [...]): New options. * config/mips/mips.opt (mdmx, mmt, mno-mdmx): New options. (mips16): Fix typo. * config/mips/mips.h (ASM_SPEC): Pass -mmt/-mno-mt and -mdmx/-mno-mdmx on to the assembler. Improve handling of -mno-mips16. Add handling of -mno-mips3d, -mno-dsp, -mno-dspr2. * doc/invoke.texi (MIPS Options): Whitespace cleanup. Fix wrong use of @itemx. Document -mno-dsp, -mno-dspr2, -mno-paired-single, -mdmx, -mno-mdmx, -mno-mips3d, -mmt and -mno-mt. From-SVN: r124153 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ac0bc8eee4b..07cf33ae7a1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2007-04-25 Thiemo Seufer + + * config/mips/mips.opt (mdmx, mmt, mno-mdmx): New options. + (mips16): Fix typo. + * config/mips/mips.h (ASM_SPEC): Pass -mmt/-mno-mt and -mdmx/-mno-mdmx + on to the assembler. Improve handling of -mno-mips16. Add handling + of -mno-mips3d, -mno-dsp, -mno-dspr2. + * doc/invoke.texi (MIPS Options): Whitespace cleanup. Fix wrong use + of @itemx. Document -mno-dsp, -mno-dspr2, -mno-paired-single, -mdmx, + -mno-mdmx, -mno-mips3d, -mmt and -mno-mt. + 2007-04-25 Danny Smith PR target/31680 diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index f1773bcbaaa..72845436cfd 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -844,10 +844,12 @@ extern const struct mips_rtx_cost_data *mips_cost; #define ASM_SPEC "\ %{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} \ %{mips32} %{mips32r2} %{mips64} \ -%{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \ -%{mips3d:-mips3d} \ -%{mdsp} \ -%{mdspr2} \ +%{mips16} %{mno-mips16:-no-mips16} \ +%{mips3d} %{mno-mips3d:-no-mips3d} \ +%{mdmx} %{mno-mdmx:-no-mdmx} \ +%{mdsp} %{mno-dsp} \ +%{mdspr2} %{mno-dspr2} \ +%{mmt} %{mno-mt} \ %{mfix-vr4120} %{mfix-vr4130} \ %(subtarget_asm_optimizing_spec) \ %(subtarget_asm_debugging_spec) \ diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index db6055ce7a9..f0c2dbf4c33 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -51,6 +51,10 @@ mdivide-traps Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS) Use trap instructions to check for integer divide by zero +mdmx +Target Report RejectNegative Var(TARGET_MDMX) +Allow the use of MDMX instructions + mdouble-float Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT) Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations @@ -147,7 +151,7 @@ Target RejectNegative Joined mips16 Target Report RejectNegative Mask(MIPS16) -Generate mips16 code +Generate MIPS16 code mips3d Target Report RejectNegative Mask(MIPS3D) @@ -173,10 +177,18 @@ mmips-tfile Target Use the mips-tfile postpass +mmt +Target Report Var(TARGET_MT) +Allow the use of MT instructions + mno-flush-func Target RejectNegative Do not use a cache-flushing function before calling stack trampolines +mno-mdmx +Target Report RejectNegative InverseVar(MDMX) +Do not use MDMX instructions + mno-mips16 Target Report RejectNegative InverseMask(MIPS16) Generate normal-mode code diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index cea120c1dc0..fb960760562 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -614,20 +614,22 @@ Objective-C and Objective-C++ Dialects}. @gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol -mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 -mips64 @gol -mips16 -mno-mips16 -mabi=@var{abi} -mabicalls -mno-abicalls @gol --mshared -mno-shared -mxgot -mno-xgot -mgp32 -mgp64 @gol --mfp32 -mfp64 -mhard-float -msoft-float @gol --msingle-float -mdouble-float -mdsp -mdspr2 -mpaired-single -mips3d @gol +-mshared -mno-shared -mxgot -mno-xgot -mgp32 -mgp64 @gol +-mfp32 -mfp64 -mhard-float -msoft-float @gol +-msingle-float -mdouble-float -mdsp -mno-dsp -mdspr2 -mno-dspr2 @gol +-mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol +-mips3d -mno-mips3d -mmt -mno-mt @gol -mlong64 -mlong32 -msym32 -mno-sym32 @gol -G@var{num} -membedded-data -mno-embedded-data @gol -muninit-const-in-rodata -mno-uninit-const-in-rodata @gol --msplit-addresses -mno-split-addresses @gol --mexplicit-relocs -mno-explicit-relocs @gol +-msplit-addresses -mno-split-addresses @gol +-mexplicit-relocs -mno-explicit-relocs @gol -mcheck-zero-division -mno-check-zero-division @gol -mdivide-traps -mdivide-breaks @gol -mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol -mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol -mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol --mfix-vr4120 -mno-fix-vr4120 -mfix-vr4130 @gol +-mfix-vr4120 -mno-fix-vr4120 -mfix-vr4130 -mno-fix-vr4130 @gol -mfix-sb1 -mno-fix-sb1 @gol -mflush-func=@var{func} -mno-flush-func @gol -mbranch-likely -mno-branch-likely @gol @@ -11472,25 +11474,25 @@ floating-point calculations using library calls instead. Assume that the floating-point coprocessor only supports single-precision operations. -@itemx -mdouble-float +@item -mdouble-float @opindex mdouble-float Assume that the floating-point coprocessor supports double-precision operations. This is the default. -@itemx -mdsp +@item -mdsp @itemx -mno-dsp @opindex mdsp @opindex mno-dsp Use (do not use) the MIPS DSP ASE. @xref{MIPS DSP Built-in Functions}. -@itemx -mdspr2 +@item -mdspr2 @itemx -mno-dspr2 @opindex mdspr2 @opindex mno-dspr2 Use (do not use) the MIPS DSP ASE REV 2. @xref{MIPS DSP Built-in Functions}. The option @option{-mdspr2} implies @option{-mdsp}. -@itemx -mpaired-single +@item -mpaired-single @itemx -mno-paired-single @opindex mpaired-single @opindex mno-paired-single @@ -11499,13 +11501,27 @@ Use (do not use) paired-single floating-point instructions. when generating 64-bit code and requires hardware floating-point support to be enabled. -@itemx -mips3d +@item -mdmx +@itemx -mno-mdmx +@opindex mdmx +@opindex mno-mdmx +Use (do not use) MIPS Digital Media Extension instructions. +This option can only be used when generating 64-bit code and requires +hardware floating-point support to be enabled. + +@item -mips3d @itemx -mno-mips3d @opindex mips3d @opindex mno-mips3d Use (do not use) the MIPS-3D ASE@. @xref{MIPS-3D Built-in Functions}. The option @option{-mips3d} implies @option{-mpaired-single}. +@item -mmt +@itemx -mno-mt +@opindex mmt +@opindex mno-mt +Use (do not use) MT Multithreading instructions. + @item -mlong64 @opindex mlong64 Force @code{long} types to be 64 bits wide. See @option{-mlong32} for