From: Andrey Miroshnikov Date: Wed, 3 Nov 2021 23:07:14 +0000 (+0000) Subject: Added link to pinmux X-Git-Tag: opf_rfc_ls005_v1~3472 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=502a8a86a1dd297005cf848efeb938e83daf760a;p=libreriscv.git Added link to pinmux --- diff --git a/crypto_router_asic.mdwn b/crypto_router_asic.mdwn index c91744b12..cb5bb2c35 100644 --- a/crypto_router_asic.mdwn +++ b/crypto_router_asic.mdwn @@ -2,6 +2,7 @@ * NLnet page: [[nlnet_2021_crypto_router]] * Top-level bugreport: +* Pinmux page: [[crypto_router_pinmux]] # Specifications diff --git a/crypto_router_pinmux.mdwn b/crypto_router_pinmux.mdwn index ba92da034..48bcbbd39 100644 --- a/crypto_router_pinmux.mdwn +++ b/crypto_router_pinmux.mdwn @@ -8,14 +8,16 @@ * QFP 200 pin? # Functionality and Pincount: -* 5x RGMII Ethernet - 5x12 = *60 pins* -* 2x USB ULPI - 2x12 = *24 pins* -* GPIO (plain and EINT) - *? pins* -* SDRAM - 16-bit data, 9-bit addr, rd/wr - *approx 30 pins?* -* I2C - *2 pins* -* SPI - assuming 4-pin - *4 pins* -* QSPI - *6 pins* -* JTAG - Can't read nmigen well enough, assuming TCK, TDO, TMS, TDI - *4 pins* -* Power Vdd and Vss - *? pins* +* 5x RGMII Ethernet - 5x12 = **60 pins** +* 2x USB ULPI - 2x12 = **24 pins** +* GPIO (plain and EINT) - **? pins** +* SDRAM - 16-bit data, 9-bit addr, rd/wr - **approx 30 pins?** +* I2C - **2 pins** +* SPI - assuming 4-pin - **4 pins** +* QSPI - **6 pins** +* JTAG - Can't read nmigen well enough, assuming TCK, TDO, TMS, TDI - **4 pins** +* Power Vdd and Vss - **? pins** -RGMII pinout count comes from [here] (https://web.pa.msu.edu/hep/atlas/l1calo/hub/hardware/components/micrel/rgmii_specification_hp_v1.3_dec_2000.pdf) \ No newline at end of file +Total (**not including power and GPIO pins**): 130 pins + +RGMII pinout count comes from [here](https://web.pa.msu.edu/hep/atlas/l1calo/hub/hardware/components/micrel/rgmii_specification_hp_v1.3_dec_2000.pdf) \ No newline at end of file