From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 21 May 2021 13:50:58 +0000 (+0100)
Subject: add dump of SPRs to pypowersim
X-Git-Tag: xlen-bcd~578
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=504ee11d2ddd46f24ccacb827b713a135e9009de;p=openpower-isa.git

add dump of SPRs to pypowersim
---

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 4ea2061a..613ad01c 100644
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -191,6 +191,17 @@ class SPR(dict):
     def __call__(self, ridx):
         return self[ridx]
 
+    def dump(self):
+        keys = list(self.keys())
+        keys.sort()
+        for k in keys:
+            sprname = spr_dict.get(k, None)
+            if sprname is None:
+                sprname = k
+            else:
+                sprname = sprname.SPR
+            print("    ", sprname, hex(self[k].value))
+
 
 class PC:
     def __init__(self, pc_init=0):
diff --git a/src/openpower/decoder/isa/pypowersim.py b/src/openpower/decoder/isa/pypowersim.py
index ca0a4900..d4e85585 100644
--- a/src/openpower/decoder/isa/pypowersim.py
+++ b/src/openpower/decoder/isa/pypowersim.py
@@ -166,8 +166,12 @@ def run_simulation():
                             initial_sprs=None, svstate=0, mmu=False,
                             initial_cr=0, mem=None,
                             initial_fprs=None)
+        print ("GPRs")
         simulator.gpr.dump()
+        print ("FPRs")
         simulator.fpr.dump()
+        print ("SPRs")
+        simulator.spr.dump()
 
 
 if __name__ == "__main__":