From: Yao Qi Date: Fri, 24 Nov 2017 09:29:43 +0000 (+0000) Subject: Change tic6x target descriptions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=506fe5f4996738f25b7c26f126a84b231429ba95;p=binutils-gdb.git Change tic6x target descriptions This patch changes tic6x target descriptions to be more flexible. Rebuild tic6x-uclinux GDBserver with my x86 g++, and the unit test passes. gdb: 2017-11-24 Yao Qi * arch/tic6x.c: New file. * arch/tic6x.h: New file. * features/Makefile (FEATURE_XMLFILES): Add tic6x-c6xp.xml, tic6x-core.xml and tic6x-gp.xml. * features/tic6x-c6xp.c: Generated. * features/tic6x-core.c: Generated. * features/tic6x-gp.c: Generated. * target-descriptions.c (maint_print_c_tdesc_cmd): Match "tic6x-". gdb/gdbserver: 2017-11-24 Yao Qi * configure.srv: Set $srv_regobj for tic6x-linux. * linux-tic6x-low.c: Include "arch/tic6x.h" and "tdesc.h". (tic6x_read_description): Move some code to tic6x_arch_setup. (tic6x_tdesc_test): New function. (initialize_low_arch): Call selftests::register_test. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index ef19cf48126..d430141d16c 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,15 @@ +2017-11-24 Yao Qi + + * arch/tic6x.c: New file. + * arch/tic6x.h: New file. + * features/Makefile (FEATURE_XMLFILES): Add tic6x-c6xp.xml, + tic6x-core.xml and tic6x-gp.xml. + * features/tic6x-c6xp.c: Generated. + * features/tic6x-core.c: Generated. + * features/tic6x-gp.c: Generated. + * target-descriptions.c (maint_print_c_tdesc_cmd): Match + "tic6x-". + 2017-11-23 Simon Marchi * mi/mi-main.c (list_available_thread_groups): Change map value diff --git a/gdb/arch/tic6x.c b/gdb/arch/tic6x.c new file mode 100644 index 00000000000..5355b885d11 --- /dev/null +++ b/gdb/arch/tic6x.c @@ -0,0 +1,47 @@ +/* Copyright (C) 2017 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "tdesc.h" +#include "tic6x.h" +#include "common/common-defs.h" + +#include "../features/tic6x-core.c" +#include "../features/tic6x-gp.c" +#include "../features/tic6x-c6xp.c" + +/* Create tic6x target descriptions according to FEATURE. */ + +target_desc * +tic6x_create_target_description (enum c6x_feature feature) +{ + target_desc *tdesc = allocate_target_description (); + + set_tdesc_architecture (tdesc, "tic6x"); + set_tdesc_osabi (tdesc, "GNU/Linux"); + + long regnum = 0; + + regnum = create_feature_tic6x_core (tdesc, regnum); + + if (feature == C6X_GP || feature == C6X_C6XP) + regnum = create_feature_tic6x_gp (tdesc, regnum); + + if (feature == C6X_C6XP) + regnum = create_feature_tic6x_c6xp (tdesc, regnum); + + return tdesc; +} diff --git a/gdb/arch/tic6x.h b/gdb/arch/tic6x.h new file mode 100644 index 00000000000..1575af0b840 --- /dev/null +++ b/gdb/arch/tic6x.h @@ -0,0 +1,26 @@ +/* Copyright (C) 2017 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +enum c6x_feature +{ + C6X_CORE, + C6X_GP, + C6X_C6XP, + C6X_LAST, +}; + +target_desc *tic6x_create_target_description (enum c6x_feature feature); diff --git a/gdb/features/Makefile b/gdb/features/Makefile index b41d56106b8..78a44ca1319 100644 --- a/gdb/features/Makefile +++ b/gdb/features/Makefile @@ -221,7 +221,10 @@ FEATURE_XMLFILES = i386/32bit-core.xml \ i386/64bit-linux.xml \ i386/64bit-pkeys.xml \ i386/64bit-sse.xml \ - i386/x32-core.xml + i386/x32-core.xml \ + tic6x-c6xp.xml \ + tic6x-core.xml \ + tic6x-gp.xml FEATURE_CFILES = $(patsubst %.xml,%.c,$(FEATURE_XMLFILES)) diff --git a/gdb/features/tic6x-c6xp.c b/gdb/features/tic6x-c6xp.c new file mode 100644 index 00000000000..5b0f566ee4c --- /dev/null +++ b/gdb/features/tic6x-c6xp.c @@ -0,0 +1,16 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: tic6x-c6xp.xml */ + +#include "arch/tdesc.h" + +static int +create_feature_tic6x_c6xp (struct target_desc *result, long regnum) +{ + struct tdesc_feature *feature; + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.c6xp", "tic6x-c6xp.xml"); + tdesc_create_reg (feature, "TSR", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "ILC", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "RILC", regnum++, 1, NULL, 32, "uint32"); + return regnum; +} diff --git a/gdb/features/tic6x-core.c b/gdb/features/tic6x-core.c new file mode 100644 index 00000000000..823d4c1da10 --- /dev/null +++ b/gdb/features/tic6x-core.c @@ -0,0 +1,47 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: tic6x-core.xml */ + +#include "arch/tdesc.h" + +static int +create_feature_tic6x_core (struct target_desc *result, long regnum) +{ + struct tdesc_feature *feature; + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core", "tic6x-core.xml"); + tdesc_create_reg (feature, "A0", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A1", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A2", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A3", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A4", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A5", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A6", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A7", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A8", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A9", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A10", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A11", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A12", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A13", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A14", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A15", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B0", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B1", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B2", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B3", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B4", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B5", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B6", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B7", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B8", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B9", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B10", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B11", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B12", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B13", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B14", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B15", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "CSR", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "PC", regnum++, 1, NULL, 32, "code_ptr"); + return regnum; +} diff --git a/gdb/features/tic6x-gp.c b/gdb/features/tic6x-gp.c new file mode 100644 index 00000000000..df0d0e37fc2 --- /dev/null +++ b/gdb/features/tic6x-gp.c @@ -0,0 +1,45 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: tic6x-gp.xml */ + +#include "arch/tdesc.h" + +static int +create_feature_tic6x_gp (struct target_desc *result, long regnum) +{ + struct tdesc_feature *feature; + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp", "tic6x-gp.xml"); + tdesc_create_reg (feature, "A16", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A17", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A18", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A19", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A20", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A21", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A22", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A23", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A24", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A25", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A26", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A27", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A28", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A29", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A30", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A31", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B16", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B17", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B18", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B19", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B20", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B21", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B22", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B23", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B24", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B25", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B26", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B27", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B28", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B29", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B30", regnum++, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B31", regnum++, 1, NULL, 32, "uint32"); + return regnum; +} diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog index b53fe30173d..03d4ad7628f 100644 --- a/gdb/gdbserver/ChangeLog +++ b/gdb/gdbserver/ChangeLog @@ -1,3 +1,11 @@ +2017-11-24 Yao Qi + + * configure.srv: Set $srv_regobj for tic6x-linux. + * linux-tic6x-low.c: Include "arch/tic6x.h" and "tdesc.h". + (tic6x_read_description): Move some code to tic6x_arch_setup. + (tic6x_tdesc_test): New function. + (initialize_low_arch): Call selftests::register_test. + 2017-11-22 Yao Qi * remote-utils.c (prepare_resume_reply): Use memcpy. diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv index 82c3dc237c3..f5fa5e6a461 100644 --- a/gdb/gdbserver/configure.srv +++ b/gdb/gdbserver/configure.srv @@ -356,16 +356,18 @@ case "${target}" in spu*-*-*) srv_regobj=reg-spu.o srv_tgtobj="spu-low.o fork-child.o fork-inferior.o" ;; - tic6x-*-uclinux) srv_regobj="tic6x-c64xp-linux.o" - srv_regobj="${srv_regobj} tic6x-c64x-linux.o" - srv_regobj="${srv_regobj} tic6x-c62x-linux.o" - srv_xmlfiles="tic6x-c64xp-linux.xml" - srv_xmlfiles="${srv_xmlfiles} tic6x-c64x-linux.xml" - srv_xmlfiles="${srv_xmlfiles} tic6x-c62x-linux.xml" + tic6x-*-uclinux) if $development; then + srv_regobj="tic6x-c64xp-linux.o" + srv_regobj="${srv_regobj} tic6x-c64x-linux.o" + srv_regobj="${srv_regobj} tic6x-c62x-linux.o" + else + srv_regobj="" + fi srv_xmlfiles="${srv_xmlfiles} tic6x-core.xml" srv_xmlfiles="${srv_xmlfiles} tic6x-gp.xml" srv_xmlfiles="${srv_xmlfiles} tic6x-c6xp.xml" srv_tgtobj="$srv_linux_obj linux-tic6x-low.o" + srv_tgtobj="${srv_tgtobj} arch/tic6x.o" srv_linux_regsets=yes srv_linux_usrregs=yes srv_linux_thread_db=yes diff --git a/gdb/gdbserver/linux-tic6x-low.c b/gdb/gdbserver/linux-tic6x-low.c index 6dda52e8eb8..7b6750a85d8 100644 --- a/gdb/gdbserver/linux-tic6x-low.c +++ b/gdb/gdbserver/linux-tic6x-low.c @@ -21,6 +21,8 @@ #include "server.h" #include "linux-low.h" +#include "arch/tic6x.h" +#include "tdesc.h" #include "nat/gdb_ptrace.h" #include @@ -189,45 +191,21 @@ static struct usrregs_info tic6x_usrregs_info = }; static const struct target_desc * -tic6x_read_description (void) +tic6x_read_description (enum c6x_feature feature) { - register unsigned int csr asm ("B2"); - unsigned int cpuid; - const struct target_desc *tdesc; + static target_desc *tdescs[C6X_LAST] = { }; + struct target_desc **tdesc = &tdescs[feature]; - /* Determine the CPU we're running on to find the register order. */ - __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :); - cpuid = csr >> 24; - switch (cpuid) + if (*tdesc == NULL) { - case 0x00: /* C62x */ - case 0x02: /* C67x */ - tic6x_regmap = tic6x_regmap_c62x; - tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ - tdesc = tdesc_tic6x_c62x_linux; - break; - case 0x03: /* C67x+ */ - tic6x_regmap = tic6x_regmap_c64x; - tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ - tdesc = tdesc_tic6x_c64x_linux; - break; - case 0x0c: /* C64x */ - tic6x_regmap = tic6x_regmap_c64x; - tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ - tdesc = tdesc_tic6x_c64x_linux; - break; - case 0x10: /* C64x+ */ - case 0x14: /* C674x */ - case 0x15: /* C66x */ - tic6x_regmap = tic6x_regmap_c64xp; - tic6x_breakpoint = 0x56454314; /* illegal opcode */ - tdesc = tdesc_tic6x_c64xp_linux; - break; - default: - error ("Unknown CPU ID 0x%02x", cpuid); + *tdesc = tic6x_create_target_description (feature); + init_target_desc (*tdesc); + + static const char *expedite_regs[] = { "A15", "PC", NULL }; + (*tdesc)->expedite_regs = expedite_regs; } - tic6x_usrregs_info.regmap = tic6x_regmap; - return tdesc; + + return *tdesc; } static int @@ -341,7 +319,44 @@ static struct regset_info tic6x_regsets[] = { static void tic6x_arch_setup (void) { - current_process ()->tdesc = tic6x_read_description (); + register unsigned int csr asm ("B2"); + unsigned int cpuid; + enum c6x_feature feature = C6X_CORE; + + /* Determine the CPU we're running on to find the register order. */ + __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :); + cpuid = csr >> 24; + switch (cpuid) + { + case 0x00: /* C62x */ + case 0x02: /* C67x */ + tic6x_regmap = tic6x_regmap_c62x; + tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ + feature = C6X_CORE; + break; + case 0x03: /* C67x+ */ + tic6x_regmap = tic6x_regmap_c64x; + tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ + feature = C6X_GP; + break; + case 0x0c: /* C64x */ + tic6x_regmap = tic6x_regmap_c64x; + tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ + feature = C6X_GP; + break; + case 0x10: /* C64x+ */ + case 0x14: /* C674x */ + case 0x15: /* C66x */ + tic6x_regmap = tic6x_regmap_c64xp; + tic6x_breakpoint = 0x56454314; /* illegal opcode */ + feature = C6X_C6XP; + break; + default: + error ("Unknown CPU ID 0x%02x", cpuid); + } + tic6x_usrregs_info.regmap = tic6x_regmap; + + current_process ()->tdesc = tic6x_read_description (feature); } /* Support for hardware single step. */ @@ -410,13 +425,33 @@ struct linux_target_ops the_low_target = { tic6x_supports_hardware_single_step, }; +#if GDB_SELF_TEST +#include "common/selftest.h" + +namespace selftests { +namespace tdesc { +static void +tic6x_tdesc_test () +{ + SELF_CHECK (*tdesc_tic6x_c62x_linux == *tic6x_read_description (C6X_CORE)); + SELF_CHECK (*tdesc_tic6x_c64x_linux == *tic6x_read_description (C6X_GP)); + SELF_CHECK (*tdesc_tic6x_c64xp_linux == *tic6x_read_description (C6X_C6XP)); +} +} +} +#endif + void initialize_low_arch (void) { +#if GDB_SELF_TEST /* Initialize the Linux target descriptions. */ init_registers_tic6x_c64xp_linux (); init_registers_tic6x_c64x_linux (); init_registers_tic6x_c62x_linux (); + selftests::register_test ("tic6x-tdesc", selftests::tdesc::tic6x_tdesc_test); +#endif + initialize_regsets_info (&tic6x_regsets_info); } diff --git a/gdb/target-descriptions.c b/gdb/target-descriptions.c index 3a5999c50de..1ba535f5e92 100644 --- a/gdb/target-descriptions.c +++ b/gdb/target-descriptions.c @@ -2327,7 +2327,8 @@ maint_print_c_tdesc_cmd (const char *args, int from_tty) counterparts. */ if (startswith (filename_after_features.c_str (), "i386/32bit-") || startswith (filename_after_features.c_str (), "i386/64bit-") - || startswith (filename_after_features.c_str (), "i386/x32-core.xml")) + || startswith (filename_after_features.c_str (), "i386/x32-core.xml") + || startswith (filename_after_features.c_str (), "tic6x-")) { print_c_feature v (filename_after_features);