From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 4 May 2020 19:41:53 +0000 (+0100)
Subject: whitespace cleanup
X-Git-Tag: div_pipeline~1387
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=509bd629f0d1314eb1696c1e87a336ddc8b93b3e;p=soc.git

whitespace cleanup
---

diff --git a/src/soc/experiment/l0_cache.py b/src/soc/experiment/l0_cache.py
index 20868d20..1b5654eb 100644
--- a/src/soc/experiment/l0_cache.py
+++ b/src/soc/experiment/l0_cache.py
@@ -325,6 +325,7 @@ class TstL0CacheBuffer(Elaboratable):
         yield self.mem.wrport.data
         # TODO: mem ports
 
+
 def wait_busy(port, no=False):
     while True:
         busy = yield port.pi.busy_o
@@ -342,6 +343,7 @@ def wait_addr(port):
             break
         yield
 
+
 def wait_ldok(port):
     while True:
         ldok = yield port.pi.ld.ok
@@ -350,6 +352,7 @@ def wait_ldok(port):
             break
         yield
 
+
 def l0_cache_st(dut, addr, data):
     l0 = dut.l0
     mem = dut.mem
@@ -414,8 +417,6 @@ def l0_cache_ldst(dut):
     yield from l0_cache_st(dut, addr, data)
     result = yield from l0_cache_ld(dut, addr, data)
     yield
-    yield
-    yield
     assert data == result, "data %x != %x" % (result, data)