From: lkcl <lkcl@web>
Date: Tue, 26 Apr 2022 23:20:30 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2572
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=50aa196a9d438f3fd469e8c5fd6988635d59f847;p=libreriscv.git

---

diff --git a/openpower/sv/biginteger/analysis.mdwn b/openpower/sv/biginteger/analysis.mdwn
index 52833d4bf..28f535db4 100644
--- a/openpower/sv/biginteger/analysis.mdwn
+++ b/openpower/sv/biginteger/analysis.mdwn
@@ -125,6 +125,10 @@ one scalar register effectively as a full 64-bit carry/chain
 but in the case of shift, an OR may glue things together, easily,
 and in parallel.
 
+With Scalar shift and rotate operations in the Power ISA already being
+complex and very comprehensive, it is hard to justify creating complex
+3-in 2-out variants when a sequence of 3 simple instructions will suffice.
+
 # Vector Multiply
 
 Long-multiply, assuming an O(N^2) algorithm, is performed by summing