From: Ian Romanick <ian.d.romanick@intel.com>
Date: Mon, 17 Oct 2016 20:55:54 +0000 (-0700)
Subject: glsl: Add a lowering pass for 64-bit integer sign()
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=50d52df278c547ffd53505a3ebf98f13cba5bd56;p=mesa.git

glsl: Add a lowering pass for 64-bit integer sign()

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
---

diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h
index 6fc7ff8ffa6..e4f78f038fd 100644
--- a/src/compiler/glsl/ir_optimization.h
+++ b/src/compiler/glsl/ir_optimization.h
@@ -52,6 +52,7 @@
 
 /* Opertaions for lower_64bit_integer_instructions() */
 #define MUL64                     (1U << 0)
+#define SIGN64                    (1U << 1)
 
 /**
  * \see class lower_packing_builtins_visitor
diff --git a/src/compiler/glsl/lower_int64.cpp b/src/compiler/glsl/lower_int64.cpp
index 5952de51c2e..a12eba85c58 100644
--- a/src/compiler/glsl/lower_int64.cpp
+++ b/src/compiler/glsl/lower_int64.cpp
@@ -361,6 +361,13 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
    assert(ir != NULL);
 
    switch (ir->operation) {
+   case ir_unop_sign:
+      if (lowering(SIGN64)) {
+         *rvalue = handle_op(ir, "__builtin_sign64", generate_ir::sign64);
+         this->progress = true;
+      }
+      break;
+
    case ir_binop_mul:
       if (lowering(MUL64)) {
          *rvalue = handle_op(ir, "__builtin_umul64", generate_ir::umul64);