From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Wed, 1 Apr 2015 07:14:02 +0000 (+0800)
Subject: soc: improve memory region conflict check
X-Git-Tag: 24jan2021_ls180~2418
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5113301130190da834fc50934fba35b14210d7cd;p=litex.git

soc: improve memory region conflict check
---

diff --git a/misoclib/soc/__init__.py b/misoclib/soc/__init__.py
index 21a0f1d7..d4d2dec2 100644
--- a/misoclib/soc/__init__.py
+++ b/misoclib/soc/__init__.py
@@ -133,13 +133,13 @@ class SoC(Module):
 			raise FinalizeError
 		self._wb_slaves.append((address_decoder, interface))
 
-	def check_memory_region(self, name, origin):
+	def add_memory_region(self, name, origin, length):
+		def in_this_region(addr):
+			return addr >= origin and addr < origin + length
 		for n, o, l in self.memory_regions:
-			if n == name or o == origin:
+			if n == name or in_this_region(o) or in_this_region(o+l-1):
 				raise ValueError("Memory region conflict between {} and {}".format(n, name))
 
-	def add_memory_region(self, name, origin, length):
-		self.check_memory_region(name, origin)
 		self.memory_regions.append((name, origin, length))
 
 	def register_mem(self, name, address, interface, size=None):