From: Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Date: Fri, 20 Nov 2015 07:42:04 +0000 (+0000)
Subject: S/390: Add bswaphi2 pattern
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=511f5bb114913b7cdaa78cb60ed46d0d5a27f5e3;p=gcc.git

S/390: Add bswaphi2 pattern

gcc/testsuite/ChangeLog:
	* gcc.target/s390/bswap-1.c: New test.

gcc/ChangeLog:
	* config/s390/s390.md ("bswaphi2"): New pattern.

From-SVN: r230643
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0a04eaa2d58..96a3a47fa57 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2015-11-20  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* config/s390/s390.md ("bswaphi2"): New pattern.
+
 2015-11-20  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 
 	* config/s390/s390.md (GPR1_REGNUM): New constant.
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index f2bb24c2431..a5335ca510a 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -10448,6 +10448,8 @@
 ; Byte swap instructions
 ;
 
+; FIXME: There is also mvcin but we cannot use it since src and target
+; may overlap.
 (define_insn "bswap<mode>2"
   [(set (match_operand:GPR 0            "register_operand"     "=d, d")
 	(bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,RT")))]
@@ -10459,6 +10461,14 @@
    (set_attr "op_type" "RRE,RXY")
    (set_attr "z10prop" "z10_super")])
 
+(define_insn "bswaphi2"
+  [(set (match_operand:HI 0           "register_operand" "=d")
+	(bswap:HI (match_operand:HI 1 "memory_operand"   "RT")))]
+  "TARGET_CPU_ZARCH"
+  "lrvh\t%0,%1"
+  [(set_attr "type" "load")
+   (set_attr "op_type" "RXY")
+   (set_attr "z10prop" "z10_super")])
 
 ;
 ; Population count instruction
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 247aa3accf1..e1e88fa5e70 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2015-11-20  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* gcc.target/s390/bswap-1.c: New test.
+
 2015-11-20  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 
 	* gcc.target/s390/pfpo.c: New test.
diff --git a/gcc/testsuite/gcc.target/s390/bswap-1.c b/gcc/testsuite/gcc.target/s390/bswap-1.c
new file mode 100644
index 00000000000..e1f113a4ccf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/bswap-1.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=z900 -mzarch" } */
+
+#include <stdint.h>
+
+uint64_t u64;
+uint32_t u32;
+uint16_t u16;
+
+uint64_t
+foo64a (uint64_t a)
+{
+  return __builtin_bswap64 (a);
+}
+/* { dg-final { scan-assembler-times "lrvgr\t%r2,%r2" 1 { target lp64 } } } */
+
+uint64_t
+foo64b ()
+{
+  return __builtin_bswap64 (u64);
+}
+/* { dg-final { scan-assembler-times "lrvg\t%r2,0\\(%r\[0-9\]*\\)" 1 { target lp64 } } } */
+
+uint32_t
+foo32 ()
+{
+  return __builtin_bswap32 (u32);
+}
+/* { dg-final { scan-assembler-times "lrv\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */
+
+uint16_t
+foo16 ()
+{
+  return __builtin_bswap16 (u16);
+}
+/* { dg-final { scan-assembler-times "lrvh\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */