From: Jeffrey A Law <law@cygnus.com>
Date: Fri, 14 Jan 2000 08:35:56 +0000 (+0000)
Subject: cse.c (cse_insn): When changing (set (pc) (reg)) to (set (pc) (label_ref))...
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=516ff948a73dc0f5520eeea790ae0d7d3a09ead9;p=gcc.git

cse.c (cse_insn): When changing (set (pc) (reg)) to (set (pc) (label_ref))...

        * cse.c (cse_insn): When changing (set (pc) (reg)) to
        (set (pc) (label_ref)), verify the change creates a valid insn.

From-SVN: r31407
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2a61193cddb..08ce9e2e328 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
 Fri Jan 14 00:28:06 2000  Jeffrey A Law  (law@cygnus.com)
 
+	* cse.c (cse_insn): When changing (set (pc) (reg)) to
+	(set (pc) (label_ref)), verify the change creates a valid insn.
+
 	* fr30.c (call_operand): Tighten and rework to match rules for
 	call RTL expressions.
 	* fr30.h (PREDICATE_CODES, case call_operand): Only allow MEMs.
diff --git a/gcc/cse.c b/gcc/cse.c
index 25821abdb2b..40d30a79d38 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -5189,8 +5189,18 @@ cse_insn (insn, libcall_insn)
 
 		trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
 
-	      SET_SRC (sets[i].rtl) = trial;
- 	      cse_jumps_altered = 1;
+	      if (trial == pc_rtx)
+		{
+		  SET_SRC (sets[i].rtl) = trial;
+		  cse_jumps_altered = 1;
+		  break;
+		}
+
+	      /* We must actually validate the change.  Consider a target
+		 where unconditional jumps are more complex than
+		 (set (pc) (label_ref)) such as the fr30.  */
+	      if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
+		cse_jumps_altered = 1;
 	      break;
 	    }