From: Luke Kenneth Casson Leighton Date: Fri, 26 Oct 2018 06:17:09 +0000 (+0100) Subject: sort out registers and add extra unit tests for add-variable-elwidth X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=518bf44d49f9ca6673a715f7c320ee5921806c52;p=riscv-tests.git sort out registers and add extra unit tests for add-variable-elwidth --- diff --git a/isa/rv64ui/sv_add_elwidth.S b/isa/rv64ui/sv_add_elwidth.S index 501be37..0ee22b6 100644 --- a/isa/rv64ui/sv_add_elwidth.S +++ b/isa/rv64ui/sv_add_elwidth.S @@ -5,30 +5,30 @@ RVTEST_RV64U # Define TVM used by program. #define SV_ELWIDTH_TEST( wid1, wid2, wid3, expect1, expect2 ) \ \ - SV_LDD_DATA( x2, testdata , 0); \ - SV_LDD_DATA( x3, testdata+8 , 0); \ - SV_LDD_DATA( x4, testdata+16, 0); \ - SV_LDD_DATA( x5, testdata+24, 0); \ + SV_LDD_DATA( x4, testdata , 0); \ + SV_LDD_DATA( x5, testdata+8 , 0); \ + SV_LDD_DATA( x12, testdata+16, 0); \ + SV_LDD_DATA( x13, testdata+24, 0); \ \ - li x28, 0; \ - li x29, 0; \ + li x14, 0; \ + li x15, 0; \ \ SET_SV_MVL( 2); \ - SET_SV_3CSRS( SV_REG_CSR( 1, 2, wid1, 2, 1), \ - SV_REG_CSR( 1, 4, wid2, 4, 1), \ - SV_REG_CSR( 1, 28, wid3, 28, 1)); \ + SET_SV_3CSRS( SV_REG_CSR( 1, 4, wid1, 4, 1), \ + SV_REG_CSR( 1, 12, wid2, 12, 1), \ + SV_REG_CSR( 1, 14, wid3, 14, 1)); \ SET_SV_VL( 2); \ \ - add x28, x2, x4; \ + add x14, x4, x12; \ \ CLR_SV_CSRS(); \ SET_SV_VL( 1); \ SET_SV_MVL( 1); \ \ - TEST_SV_IMM( x28, expect1); \ - TEST_SV_IMM( x29, expect2); \ - TEST_SV_IMM( x4, 0x0000005242322212); \ - TEST_SV_IMM( x5, 0x0000005141312111); + TEST_SV_IMM( x14, expect1 ); \ + TEST_SV_IMM( x15, expect2 ); \ + TEST_SV_IMM( x12, 0x0000005242322212); \ + TEST_SV_IMM( x13, 0x0000005141312111); # SV test: vector-vector add @@ -40,10 +40,9 @@ RVTEST_RV64U # Define TVM used by program. RVTEST_CODE_BEGIN # Start of test code. # - SV_ELWIDTH_TEST( 0, 0, 0, 0x000000ab8b6b4b2b, 0x000000aa8a6a4a2a ) - //SV_ELWIDTH_TEST( 0x2, 0, 0, 41, 43 ) - //SV_ELWIDTH_TEST( 0x3, 0, 0, 42, 43 ) - //SV_ELWIDTH_TEST( 0x0, 0, 0, 41, 42 ) + SV_ELWIDTH_TEST( 0, 0, 0, 0x000000ab8b6b4b2b, 0x000000a888684828 ) + SV_ELWIDTH_TEST( 0, 0, 3, 0x886848288b6b4b2b, 0x0000000000000000 ) + SV_ELWIDTH_TEST( 1, 1, 0, 0x000000000000002b, 0x000000000000004b ) RVTEST_PASS # Signal success. fail: