From: lkcl <lkcl@web>
Date: Thu, 21 Jul 2022 00:15:16 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1154
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=51d452d679d7e6091e6ec032544d7d74ca25ccfd;p=libreriscv.git

---

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 25bab115b..83acd9202 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -325,7 +325,7 @@ disables SV (`scalar identity behaviour`).
 | 1         | MASK/MASK_SRC are encoded using CR-based Predication |
 
 Integer Twin predication has a second set of 3 bits that uses the same
-encoding thus allowing either the same register (r3 or r10) to be used
+encoding thus allowing either the same register (r3, r10 or r31) to be used
 for both src and dest, or different regs (one for src, one for dest).
 
 Likewise CR based twin predication has a second set of 3 bits, allowing