From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 29 Sep 2018 04:34:41 +0000 (+0100)
Subject: make sv csr tables a union so they can be assigned to a ushort easily
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=51f086ec6f97aa511ca35aa4e8d6896b5b2172bd;p=riscv-isa-sim.git

make sv csr tables a union so they can be assigned to a ushort easily
---

diff --git a/riscv/sv.h b/riscv/sv.h
index ef4f755..93f3fcf 100644
--- a/riscv/sv.h
+++ b/riscv/sv.h
@@ -9,14 +9,17 @@
 // it's a CAM that's used to generate 2 tables (below)
 // just as in RV, writing to entries in this CAM *clears*
 // all entries with a higher index
-typedef struct {
-    unsigned int type   : 1; // 0=INT, 1=FP
-    uint64_t     regkey : 5; // 5 bits
-    unsigned int elwidth: 2; // 0=8-bit, 1=dflt, 2=dflt/2 3=dflt*2
-    uint64_t     regidx : 6; // yes 6 bits
-    unsigned int isvec  : 1; // vector=1, scalar=0
-    unsigned int packed : 1; // Packed SIMD=1
-} sv_reg_csr_entry;
+union sv_reg_csr_entry {
+    struct {
+        unsigned int type   : 1; // 0=INT, 1=FP
+        uint64_t     regkey : 5; // 5 bits
+        unsigned int elwidth: 2; // 0=8-bit, 1=dflt, 2=dflt/2 3=dflt*2
+        uint64_t     regidx : 6; // yes 6 bits
+        unsigned int isvec  : 1; // vector=1, scalar=0
+        unsigned int packed : 1; // Packed SIMD=1
+    } b;
+    unsigned short u;
+};
 
 // TODO: define separate SV CSRs for M-mode and S-Mode
 // M-Mode and S-Mode will need a minimum of 2 for int-only
@@ -39,14 +42,17 @@ typedef struct {
     unsigned int active : 1; // enabled=1, disabled=0
 } sv_reg_entry;
 
-typedef struct {
-    unsigned int type  : 1; // 0=INT, 1=FP
-    uint64_t     regkey: 5; // 5 bits
-    unsigned int zero  : 1; // zeroing=1, skipping=0
-    unsigned int inv   : 1; // inversion=1
-    uint64_t     regidx: 6; // 6 bits
-    unsigned int active: 1; // enabled=1, disabled=0
-} sv_pred_csr_entry;
+union sv_pred_csr_entry {
+    struct {
+        unsigned int type  : 1; // 0=INT, 1=FP
+        uint64_t     regkey: 5; // 5 bits
+        unsigned int zero  : 1; // zeroing=1, skipping=0
+        unsigned int inv   : 1; // inversion=1
+        uint64_t     regidx: 6; // 6 bits
+        unsigned int active: 1; // enabled=1, disabled=0
+    } b;
+    unsigned short u;
+};
 
 typedef struct {
     uint64_t     regkey: 5; // 5 bits