From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 25 Jul 2019 13:44:17 +0000 (-0700)
Subject: Merge pull request #1224 from YosysHQ/xilinx_fix_ff
X-Git-Tag: working-ls180~1181^2~3
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5248a902ef9d2e30802c3924afb19a74935adbef;p=yosys.git

Merge pull request #1224 from YosysHQ/xilinx_fix_ff

xilinx: Fix missing cell name underscore in cells_map.v
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5248a902ef9d2e30802c3924afb19a74935adbef