From: Andreas Sandberg Date: Thu, 7 Dec 2017 16:43:44 +0000 (+0000) Subject: system-arm: Update gem5 timer interrupt specification X-Git-Tag: v19.0.0.0~2082 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=525ce650e1a5bbe71c39d4b15598d6c003cc9f9e;p=gem5.git system-arm: Update gem5 timer interrupt specification The DTB for the VExpress_GEM5_V1 was incorrectly flagging timer interrupts as being edge triggered. Describe the interrupt as being level triggered to match Juno and FVP. Change-Id: I9ce4b8959e7cc28d8b208727119ff20e581311f8 Signed-off-by: Andreas Sandberg Reviewed-by: Gabor Dozsa Reviewed-on: https://gem5-review.googlesource.com/10024 Reviewed-by: Giacomo Travaglini --- diff --git a/system/arm/dt/platforms/vexpress_gem5_v1.dtsi b/system/arm/dt/platforms/vexpress_gem5_v1.dtsi index 4d463e794..d7d77fb6f 100644 --- a/system/arm/dt/platforms/vexpress_gem5_v1.dtsi +++ b/system/arm/dt/platforms/vexpress_gem5_v1.dtsi @@ -51,9 +51,9 @@ timer { compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; - interrupts = <1 13 0xff01>, - <1 14 0xff01>, - <1 11 0xff01>; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>; clocks = <&osc_sys>; clock-names="apb_pclk"; };