From: Eddie Hung Date: Fri, 13 Dec 2019 20:01:03 +0000 (-0800) Subject: Merge pull request #1533 from dh73/bram_xilinx X-Git-Tag: working-ls180~926 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=52875b0d61b2b1cc83a9e9d51964a92027c3758c;p=yosys.git Merge pull request #1533 from dh73/bram_xilinx Adjust Xilinx xc7/xcu BRAM min bits threshold for RAMB18E1 --- 52875b0d61b2b1cc83a9e9d51964a92027c3758c