From: Richard Stallman Date: Sun, 21 Mar 1993 22:35:49 +0000 (+0000) Subject: (mulsidi3, umulsidi3): Add missing sign_extend X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=52a866cec9e7d35f5cdb1355cce2aa5b03e264d0;p=gcc.git (mulsidi3, umulsidi3): Add missing sign_extend and zero_extend so all operands have them. From-SVN: r3817 --- diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index c31ba9b2e1f..e4e01764669 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -2368,13 +2368,15 @@ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "")) (zero_extend:DI - (match_operand:SI 2 "nonimmediate_operand" ""))) 1)) + (match_operand:SI 2 "nonimmediate_operand" ""))) + 1)) (set (subreg:SI (match_dup 0) 0) (subreg:SI (mult:DI (zero_extend:DI (match_dup 1)) (zero_extend:DI - (match_dup 2))) 0))])] + (match_dup 2))) + 0))])] "TARGET_68020" "") @@ -2384,13 +2386,15 @@ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0")) (zero_extend:DI - (match_operand:SI 2 "nonimmediate_operand" "dm"))) 1)) + (match_operand:SI 2 "nonimmediate_operand" "dm"))) + 1)) (set (match_operand:SI 3 "register_operand" "=d") (subreg:SI (mult:DI (zero_extend:DI (match_dup 1)) (zero_extend:DI - (match_dup 2))) 0))] + (match_dup 2))) + 0))] "TARGET_68020" "mulu%.l %2,%3:%0") @@ -2399,12 +2403,16 @@ (subreg:SI (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0")) - (match_operand:SI 2 "immediate_operand" "sK")) 1)) + (zero_extend:DI + (match_operand:SI 2 "immediate_operand" "sK"))) + 1)) (set (match_operand:SI 3 "register_operand" "=d") (subreg:SI (mult:DI (zero_extend:DI (match_dup 1)) - (match_dup 2)) 0))] + (zero_extend:DI + (match_dup 2))) + 0))] "TARGET_68020 && (GET_CODE (operands[2]) != CONST_INT || CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'K'))" @@ -2417,13 +2425,15 @@ (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "")) (sign_extend:DI - (match_operand:SI 2 "nonimmediate_operand" ""))) 1)) + (match_operand:SI 2 "nonimmediate_operand" ""))) + 1)) (set (subreg:SI (match_dup 0) 0) (subreg:SI (mult:DI (sign_extend:DI (match_dup 1)) (sign_extend:DI - (match_dup 2))) 0))])] + (match_dup 2))) + 0))])] "TARGET_68020" "") @@ -2433,13 +2443,15 @@ (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%0")) (sign_extend:DI - (match_operand:SI 2 "nonimmediate_operand" "dm"))) 1)) + (match_operand:SI 2 "nonimmediate_operand" "dm"))) + 1)) (set (match_operand:SI 3 "register_operand" "=d") (subreg:SI (mult:DI (sign_extend:DI (match_dup 1)) (sign_extend:DI - (match_dup 2))) 0))] + (match_dup 2))) + 0))] "TARGET_68020" "muls%.l %2,%3:%0") @@ -2448,12 +2460,16 @@ (subreg:SI (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%0")) - (match_operand:SI 2 "immediate_operand" "sK")) 1)) + (sign_extend:DI + (match_operand:SI 2 "immediate_operand" "sK"))) + 1)) (set (match_operand:SI 3 "register_operand" "=d") (subreg:SI (mult:DI (sign_extend:DI (match_dup 1)) - (match_dup 2)) 0))] + (sign_extend:DI + (match_dup 2))) + 0))] "TARGET_68020 && (GET_CODE (operands[2]) != CONST_INT || CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'K'))"