From: Jeff Law <law@redhat.com>
Date: Thu, 11 Jul 1996 18:46:41 +0000 (+0000)
Subject:         * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=52aa53362eb354df48dbeed236ef7576e13bffac;p=binutils-gdb.git

    * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
        if the next arg is marked with SRC_IN_DST.  Gross.
Gross hack so that shift-by-two insns are disassembled correctly.
---

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index a6af4aca079..7c913cde092 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,8 @@
 Thu Jul 11 11:58:44 1996  Jeffrey A Law  (law@cygnus.com)
-	
+
+	* h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
+	if the next arg is marked with SRC_IN_DST.  Gross.
+
 	* h8300-dis.c (bfd_h8_disassemble): Print "exr" when
 	we're looking for and find EXR.
 
diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c
index 7481019252d..659ead83671 100644
--- a/opcodes/h8300-dis.c
+++ b/opcodes/h8300-dis.c
@@ -287,6 +287,10 @@ bfd_h8_disassemble (addr, info, mode)
 			  }
 			else if (x & (IMM|KBIT|DBIT))
 			  {
+			    /* Bletch.  For shal #2,er0 and friends.  */
+			    if (*(args+1) & SRC_IN_DST)
+			      abs = 2;
+
 			    fprintf (stream, "#0x%x", (unsigned) abs);
 			  }
 			else if (x & REG)