From: Dave Airlie <airlied@redhat.com>
Date: Thu, 12 Feb 2009 15:11:25 +0000 (+1000)
Subject: Merge remote branch 'origin/master' into radeon-rewrite
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=53116910b10e3b8a05f42970eff311c21808699f;p=mesa.git

Merge remote branch 'origin/master' into radeon-rewrite

Conflicts:
	configure.ac
	src/mesa/drivers/dri/r200/r200_context.c
	src/mesa/drivers/dri/r300/r300_render.c
---

53116910b10e3b8a05f42970eff311c21808699f
diff --cc src/mesa/drivers/dri/r200/r200_context.c
index 1f5a9f2427b,c06751516eb..431bf8235c3
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@@ -61,11 -62,6 +61,8 @@@ WITH THE SOFTWARE OR THE USE OR OTHER D
  #include "r200_maos.h"
  #include "r200_vertprog.h"
  
 +#include "radeon_span.h"
 +
- #define need_GL_ARB_multisample
- #define need_GL_ARB_texture_compression
- #define need_GL_ARB_vertex_buffer_object
  #define need_GL_ARB_vertex_program
  #define need_GL_ATI_fragment_shader
  #define need_GL_EXT_blend_minmax
diff --cc src/mesa/drivers/dri/r300/r300_context.c
index 8bad6467f2d,4c14c7eefed..6d68309d3f0
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@@ -344,8 -308,11 +349,10 @@@ GLboolean r300CreateContext(const __GLc
  #if 0
  	ctx->Const.MaxArrayLockSize =
  	    ( /*512 */ RADEON_BUFFER_SIZE * 16 * 1024) / (4 * 4);
 -#endif
  #endif
  
+ 	ctx->Const.MaxDrawBuffers = 1;
+ 
  	/* Initialize the software rasterizer and helper modules.
  	 */
  	_swrast_CreateContext(ctx);
diff --cc src/mesa/drivers/dri/r300/r300_render.c
index 8055952a768,16ce4a11999..f46477f0f67
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@@ -173,47 -175,43 +173,49 @@@ int r300NumVerts(r300ContextPtr rmesa, 
  static void r300EmitElts(GLcontext * ctx, void *elts, unsigned long n_elts)
  {
  	r300ContextPtr rmesa = R300_CONTEXT(ctx);
 -	struct r300_dma_region *rvb = &rmesa->state.elt_dma;
  	void *out;
  
 -	if (r300IsGartMemory(rmesa, elts, n_elts * 4)) {
 -		rvb->address = rmesa->radeon.radeonScreen->gartTextures.map;
 -		rvb->start = ((char *)elts) - rvb->address;
 -		rvb->aos_offset =
 -		    rmesa->radeon.radeonScreen->gart_texture_offset +
 -		    rvb->start;
 -		return;
 -	} else if (r300IsGartMemory(rmesa, elts, 1)) {
 -		WARN_ONCE("Pointer not within GART memory!\n");
 -		_mesa_exit(-1);
 -	}
 -
 -	r300AllocDmaRegion(rmesa, rvb, n_elts * 4, 4);
 -	rvb->aos_offset = GET_START(rvb);
 -
 -	out = rvb->address + rvb->start;
 +	radeonAllocDmaRegion(&rmesa->radeon, &rmesa->state.elt_dma_bo,
 +			     &rmesa->state.elt_dma_offset, n_elts * 4, 4);
 +	radeon_bo_map(rmesa->state.elt_dma_bo, 1);
 +	out = rmesa->state.elt_dma_bo->ptr + rmesa->state.elt_dma_offset;
  	memcpy(out, elts, n_elts * 4);
 +	radeon_bo_unmap(rmesa->state.elt_dma_bo);
  }
  
 -static void r300FireEB(r300ContextPtr rmesa, unsigned long addr,
 -		       int vertex_count, int type)
 +static void r300FireEB(r300ContextPtr rmesa, int vertex_count, int type)
  {
 -	int cmd_reserved = 0;
 -	int cmd_written = 0;
 -	drm_radeon_cmd_header_t *cmd = NULL;
 -
 -	start_packet3(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0), 0);
 -	e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count << 16) | type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit);
 -
 -	start_packet3(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2), 2);
 -	e32(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
 -	    (R300_VAP_PORT_IDX0 >> 2));
 -	e32(addr);
 -	e32(vertex_count);
 +	BATCH_LOCALS(&rmesa->radeon);
 +
 +	if (vertex_count > 0) {
 +		BEGIN_BATCH(10);
 +		OUT_BATCH_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0);
 +		OUT_BATCH(R300_VAP_VF_CNTL__PRIM_WALK_INDICES |
 +			  ((vertex_count + 0) << 16) |
 +			  type |
 +			  R300_VAP_VF_CNTL__INDEX_SIZE_32bit);
 +		
 +		if (!rmesa->radeon.radeonScreen->kernel_mm) {
 +			OUT_BATCH_PACKET3(R300_PACKET3_INDX_BUFFER, 2);
- 			OUT_BATCH(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2);
++			OUT_BATCH(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
++	    			 (R300_VAP_PORT_IDX0 >> 2));
 +			OUT_BATCH_RELOC(rmesa->state.elt_dma_offset,
 +					rmesa->state.elt_dma_bo,
 +					rmesa->state.elt_dma_offset,
 +					RADEON_GEM_DOMAIN_GTT, 0, 0);
 +			OUT_BATCH(vertex_count);
 +		} else {
 +			OUT_BATCH_PACKET3(R300_PACKET3_INDX_BUFFER, 2);
- 			OUT_BATCH(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2);
++			OUT_BATCH(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
++	    			 (R300_VAP_PORT_IDX0 >> 2));
 +			OUT_BATCH(rmesa->state.elt_dma_offset);
 +			OUT_BATCH(vertex_count);
 +			radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
 +					      rmesa->state.elt_dma_bo,
 +					      RADEON_GEM_DOMAIN_GTT, 0, 0);
 +		}
 +		END_BATCH();
 +	}
  }
  
  static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
diff --cc src/mesa/drivers/dri/radeon/radeon_screen.c
index 8b06fb4d3e9,56c22faafa7..21b94d2e527
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@@ -212,7 -206,10 +212,9 @@@ DRI_CONF_BEGI
  DRI_CONF_END;
  static const GLuint __driNConfigOptions = 17;
  
+ extern const struct dri_extension gl_20_extension[];
+ 
  #ifndef RADEON_DEBUG
 -int RADEON_DEBUG = 0;
  
  static const struct dri_debug_control debug_control[] = {
  	{"fall", DEBUG_FALLBACKS},