From: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Thu, 31 Dec 2015 20:00:58 +0000 (-0800)
Subject: anv/pipeline: Better vertex input channel setup
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5318424d4999b49cca84b11bc4d2eb70a7444fb8;p=mesa.git

anv/pipeline: Better vertex input channel setup

First off, it now uses isl formats instead of anv_format.  Also, it
properly handles integer vs. floating-point default channels and can
properly handle alpha-only channels.  (Not sure if those are allowed).
---

diff --git a/src/vulkan/gen7_pipeline.c b/src/vulkan/gen7_pipeline.c
index 9d83c76d5f2..f4070743710 100644
--- a/src/vulkan/gen7_pipeline.c
+++ b/src/vulkan/gen7_pipeline.c
@@ -73,7 +73,8 @@ emit_vertex_input(struct anv_pipeline *pipeline,
    for (uint32_t i = 0; i < info->vertexAttributeDescriptionCount; i++) {
       const VkVertexInputAttributeDescription *desc =
          &info->pVertexAttributeDescriptions[i];
-      const struct anv_format *format = anv_format_for_vk_format(desc->format);
+      enum isl_format format = anv_get_isl_format(desc->format,
+                                                  VK_IMAGE_ASPECT_COLOR_BIT);
 
       assert(desc->binding < 32);
 
@@ -85,13 +86,13 @@ emit_vertex_input(struct anv_pipeline *pipeline,
       struct GEN7_VERTEX_ELEMENT_STATE element = {
          .VertexBufferIndex = desc->binding,
          .Valid = true,
-         .SourceElementFormat = format->surface_format,
+         .SourceElementFormat = format,
          .EdgeFlagEnable = false,
          .SourceElementOffset = desc->offset,
-         .Component0Control = VFCOMP_STORE_SRC,
-         .Component1Control = format->num_channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
-         .Component2Control = format->num_channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
-         .Component3Control = format->num_channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
+         .Component0Control = vertex_element_comp_control(format, 0),
+         .Component1Control = vertex_element_comp_control(format, 1),
+         .Component2Control = vertex_element_comp_control(format, 2),
+         .Component3Control = vertex_element_comp_control(format, 3),
       };
       GEN7_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + slot * 2], &element);
    }
diff --git a/src/vulkan/gen8_pipeline.c b/src/vulkan/gen8_pipeline.c
index 5ecc8cfdf0e..ae8ab404746 100644
--- a/src/vulkan/gen8_pipeline.c
+++ b/src/vulkan/gen8_pipeline.c
@@ -69,7 +69,8 @@ emit_vertex_input(struct anv_pipeline *pipeline,
    for (uint32_t i = 0; i < info->vertexAttributeDescriptionCount; i++) {
       const VkVertexInputAttributeDescription *desc =
          &info->pVertexAttributeDescriptions[i];
-      const struct anv_format *format = anv_format_for_vk_format(desc->format);
+      enum isl_format format = anv_get_isl_format(desc->format,
+                                                  VK_IMAGE_ASPECT_COLOR_BIT);
 
       assert(desc->binding < 32);
 
@@ -81,13 +82,13 @@ emit_vertex_input(struct anv_pipeline *pipeline,
       struct GENX(VERTEX_ELEMENT_STATE) element = {
          .VertexBufferIndex = desc->binding,
          .Valid = true,
-         .SourceElementFormat = format->surface_format,
+         .SourceElementFormat = format,
          .EdgeFlagEnable = false,
          .SourceElementOffset = desc->offset,
-         .Component0Control = VFCOMP_STORE_SRC,
-         .Component1Control = format->num_channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
-         .Component2Control = format->num_channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
-         .Component3Control = format->num_channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
+         .Component0Control = vertex_element_comp_control(format, 0),
+         .Component1Control = vertex_element_comp_control(format, 1),
+         .Component2Control = vertex_element_comp_control(format, 2),
+         .Component3Control = vertex_element_comp_control(format, 3),
       };
       GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + slot * 2], &element);
 
diff --git a/src/vulkan/genX_pipeline_util.h b/src/vulkan/genX_pipeline_util.h
index fd294f8befc..08fe6aac6a4 100644
--- a/src/vulkan/genX_pipeline_util.h
+++ b/src/vulkan/genX_pipeline_util.h
@@ -21,6 +21,32 @@
  * IN THE SOFTWARE.
  */
 
+static uint32_t
+vertex_element_comp_control(enum isl_format format, unsigned comp)
+{
+   uint8_t bits;
+   switch (comp) {
+   case 0: bits = isl_format_layouts[format].channels.r.bits; break;
+   case 1: bits = isl_format_layouts[format].channels.g.bits; break;
+   case 2: bits = isl_format_layouts[format].channels.b.bits; break;
+   case 3: bits = isl_format_layouts[format].channels.a.bits; break;
+   default: unreachable("Invalid component");
+   }
+
+   if (bits) {
+      return VFCOMP_STORE_SRC;
+   } else if (comp < 3) {
+      return VFCOMP_STORE_0;
+   } else if (isl_format_layouts[format].channels.r.type == ISL_UINT ||
+            isl_format_layouts[format].channels.r.type == ISL_SINT) {
+      assert(comp == 3);
+      return VFCOMP_STORE_1_INT;
+   } else {
+      assert(comp == 3);
+      return VFCOMP_STORE_1_FP;
+   }
+}
+
 static const uint32_t vk_to_gen_cullmode[] = {
    [VK_CULL_MODE_NONE]                       = CULLMODE_NONE,
    [VK_CULL_MODE_FRONT_BIT]                  = CULLMODE_FRONT,