From: Jakub Jelinek <jakub@redhat.com>
Date: Wed, 31 Jul 2019 13:49:26 +0000 (+0200)
Subject: re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=538e4cdc15fdfc06f2a54f1a92bc996ec99cb528;p=gcc.git

re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)

	PR tree-optimization/91201
	* config/i386/mmx.md (reduc_plus_scal_v8qi): New expander.

	* gcc.target/i386/sse2-pr91201-2.c: New test.

From-SVN: r273932
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5bfe7bc09b1..a883b23cc21 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-07-31  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/91201
+	* config/i386/mmx.md (reduc_plus_scal_v8qi): New expander.
+
 2019-07-31  Andrew Stubbs  <ams@codesourcery.com>
 
 	* config/gcn/gcn-valu.md
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index c78b33b510a..b4738ae5ba3 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1897,6 +1897,21 @@
    (set_attr "type" "mmxshft,sseiadd,sseiadd")
    (set_attr "mode" "DI,TI,TI")])
 
+(define_expand "reduc_plus_scal_v8qi"
+ [(plus:V8QI
+    (match_operand:QI 0 "register_operand")
+    (match_operand:V8QI 1 "register_operand"))]
+ "TARGET_MMX_WITH_SSE"
+{
+  rtx tmp = gen_reg_rtx (V8QImode);
+  emit_move_insn (tmp, CONST0_RTX (V8QImode));
+  rtx tmp2 = gen_reg_rtx (V1DImode);
+  emit_insn (gen_mmx_psadbw (tmp2, operands[1], tmp));
+  tmp2 = gen_lowpart (V8QImode, tmp2);
+  emit_insn (gen_vec_extractv8qiqi (operands[0], tmp2, const0_rtx));
+  DONE;
+})
+
 (define_insn_and_split "mmx_pmovmskb"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
 	(unspec:SI [(match_operand:V8QI 1 "register_operand" "y,x")]
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 44166d1385e..91378f2cff6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-07-31  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/91201
+	* gcc.target/i386/sse2-pr91201-2.c: New test.
+
 2019-07-31  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/91178
diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr91201-2.c b/gcc/testsuite/gcc.target/i386/sse2-pr91201-2.c
new file mode 100644
index 00000000000..d711ee06d40
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse2-pr91201-2.c
@@ -0,0 +1,21 @@
+/* PR tree-optimization/91201 */
+/* { dg-do compile { target lp64 } } */
+/* { dg-options "-O3 -msse2 -mno-sse3" } */
+/* { dg-final { scan-assembler "\tpsadbw\t" } } */
+
+unsigned char bytes[1024];
+
+unsigned char
+sum (void)
+{
+  unsigned char r = 0;
+  unsigned char *p = (unsigned char *) bytes;
+  int n;
+
+  for (n = 8; n < sizeof (bytes); ++n)
+    {
+      p[n - 8] += p[n];
+      r += p[n];
+    }
+  return r;
+}