From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 18 Mar 2020 11:30:58 +0000 (+0000)
Subject: import absolute paths
X-Git-Tag: div_pipeline~1692
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5398d756450e7858e1d1763950e0428e0524f60e;p=soc.git

import absolute paths
---

diff --git a/src/soc/decoder/test/test_power_decoder.py b/src/soc/decoder/test/test_power_decoder.py
index 71b0fd91..4960f442 100644
--- a/src/soc/decoder/test/test_power_decoder.py
+++ b/src/soc/decoder/test/test_power_decoder.py
@@ -2,12 +2,11 @@ from nmigen import Module, Signal
 from nmigen.back.pysim import Simulator, Delay
 from nmigen.test.utils import FHDLTestCase
 from nmigen.cli import rtlil
-import sys
 import os
 import unittest
-sys.path.append("../")
-from power_decoder import (create_pdecode)
-from power_enums import (Function, InternalOp, In1Sel, In2Sel, In3Sel,
+from soc.decoder.power_decoder import (create_pdecode)
+from soc.decoder.power_enums import (Function, InternalOp,
+                         In1Sel, In2Sel,In3Sel,
                          OutSel, RC, LdstLen, CryIn, single_bit_flags,
                          get_signal_name, get_csv)