From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Mon, 25 Mar 2013 13:43:44 +0000 (+0100)
Subject: bank/description/Register: add get_size
X-Git-Tag: 24jan2021_ls180~2099^2~625
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=53edc3557e9d828a7899888dde028f6dffe2ac7c;p=litex.git

bank/description/Register: add get_size
---

diff --git a/migen/bank/description.py b/migen/bank/description.py
index 3b9846db..160f2fb4 100644
--- a/migen/bank/description.py
+++ b/migen/bank/description.py
@@ -19,6 +19,9 @@ class RegisterRaw(_Register):
 		self.r = Signal(self.size)
 		self.w = Signal(self.size)
 
+	def get_size(self):
+		return self.size
+
 (READ_ONLY, WRITE_ONLY, READ_WRITE) = range(3)
 
 class Field:
@@ -45,6 +48,9 @@ class RegisterFields(_Register):
 		_Register.__init__(self, name)
 		self.fields = fields
 
+	def get_size(self):
+		return sum(field.size for field in self.fields)
+
 class RegisterField(RegisterFields):
 	def __init__(self, size=1, access_bus=READ_WRITE, access_dev=READ_ONLY, reset=0, atomic_write=False, name=None):
 		self.field = Field(size, access_bus, access_dev, reset, atomic_write, name="")