From: Kelvin Nilsen <kelvin@gcc.gnu.org>
Date: Mon, 13 Jun 2016 17:59:12 +0000 (+0000)
Subject: altivec.h (vec_absd): New macro for vector absolute difference unsigned.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5408a64ac460645337ec95e82d46cdf1641f60de;p=gcc.git

altivec.h (vec_absd): New macro for vector absolute difference unsigned.

gcc/ChangeLog:

2016-06-13  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/altivec.h (vec_absd): New macro for vector absolute
	difference unsigned.
	(vec_absdb): New macro for vector absolute difference unsigned
	byte.
	(vec_absdh): New macro for vector absolute difference unsigned
	half-word.
	(vec_absdw): New macro for vector absolute difference unsigned word.
	* config/rs6000/altivec.md (UNSPEC_VADU): New value.
	(vadu<mode>3): New insn.
	(*p9_vadu<mode>3): New insn.
	* config/rs6000/rs6000-builtin.def (vadub): New built-in
	definition.
	(vaduh): New built-in definition.
	(vaduw): New built-in definition.
	(vadu): New overloaded built-in definition.
	(vadub): New overloaded built-in definition.
	(vaduh): New overloaded built-in definition.
	(vaduw): New overloaded built-in definition.
	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
	overloaded vector absolute difference unsigned functions.
	* doc/extend.texi (PowerPC AltiVec Built-in Functions): Document
	the ISA 3.0 vector absolute difference unsigned built-in functions.

gcc/testsuite/ChangeLog:

2016-06-13  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/vadsdu-0.c: New test.
	* gcc.target/powerpc/vadsdu-1.c: New test.
	* gcc.target/powerpc/vadsdu-2.c: New test.
	* gcc.target/powerpc/vadsdu-3.c: New test.
	* gcc.target/powerpc/vadsdu-4.c: New test.
	* gcc.target/powerpc/vadsdu-5.c: New test.
	* gcc.target/powerpc/vadsdub-1.c: New test.
	* gcc.target/powerpc/vadsdub-2.c: New test.
	* gcc.target/powerpc/vadsduh-1.c: New test.
	* gcc.target/powerpc/vadsduh-2.c: New test.
	* gcc.target/powerpc/vadsduw-1.c: New test.
	* gcc.target/powerpc/vadsduw-2.c: New test.

From-SVN: r237390
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b1026bdcf47..541c76ad076 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,28 @@
+2016-06-13  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	* config/rs6000/altivec.h (vec_absd): New macro for vector absolute
+	difference unsigned.
+	(vec_absdb): New macro for vector absolute difference unsigned
+	byte.
+	(vec_absdh): New macro for vector absolute difference unsigned
+	half-word.
+	(vec_absdw): New macro for vector absolute difference unsigned word.
+	* config/rs6000/altivec.md (UNSPEC_VADU): New value.
+	(vadu<mode>3): New insn.
+	(*p9_vadu<mode>3): New insn.
+	* config/rs6000/rs6000-builtin.def (vadub): New built-in
+	definition.
+	(vaduh): New built-in definition.
+	(vaduw): New built-in definition.
+	(vadu): New overloaded built-in definition.
+	(vadub): New overloaded built-in definition.
+	(vaduh): New overloaded built-in definition.
+	(vaduw): New overloaded built-in definition.
+	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
+	overloaded vector absolute difference unsigned functions.
+	* doc/extend.texi (PowerPC AltiVec Built-in Functions): Document
+	the ISA 3.0 vector absolute difference unsigned built-in functions.
+
 2016-06-13  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* tree-ssa-sccvn.c (vn_reference_lookup_3): Use a uniform test and
diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 3ce74ab9144..9123d969be9 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -402,6 +402,11 @@
 #define vec_vprtybq __builtin_vec_vprtybq
 #endif
 
+#define vec_absd __builtin_vec_vadu
+#define vec_absdb __builtin_vec_vadub
+#define vec_absdh __builtin_vec_vaduh
+#define vec_absdw __builtin_vec_vaduw
+
 #define vec_slv __builtin_vec_vslv
 #define vec_srv __builtin_vec_vsrv
 #endif
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index d081bd1afbd..0cd67a4ec99 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -114,6 +114,7 @@
    UNSPEC_STVLXL
    UNSPEC_STVRX
    UNSPEC_STVRXL
+   UNSPEC_VADU
    UNSPEC_VSLV
    UNSPEC_VSRV
    UNSPEC_VMULWHUB
@@ -3464,6 +3465,24 @@
   [(set_attr "length" "4")
    (set_attr "type" "vecsimple")])
 
+;; Vector absolute difference unsigned
+(define_expand "vadu<mode>3"
+  [(set (match_operand:VI 0 "register_operand")
+        (unspec:VI [(match_operand:VI 1 "register_operand")
+		    (match_operand:VI 2 "register_operand")]
+         UNSPEC_VADU))]
+  "TARGET_P9_VECTOR")
+
+;; Vector absolute difference unsigned
+(define_insn "*p9_vadu<mode>3"
+  [(set (match_operand:VI 0 "register_operand" "=v")
+        (unspec:VI [(match_operand:VI 1 "register_operand" "v")
+		    (match_operand:VI 2 "register_operand" "v")]
+         UNSPEC_VADU))]
+  "TARGET_P9_VECTOR"
+  "vabsdu<wd> %0,%1,%2"
+  [(set_attr "type" "vecsimple")])
+
 ;; Vector count trailing zeros
 (define_insn "*p9v_ctz<mode>2"
   [(set (match_operand:VI2 0 "register_operand" "=v")
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 606d7ae2840..80fe92a9d45 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1757,6 +1757,17 @@ BU_P9V_AV_2 (VSRV,		"vsrv",			CONST, vsrv)
 BU_P9V_OVERLOAD_2 (VSLV,	"vslv")
 BU_P9V_OVERLOAD_2 (VSRV,	"vsrv")
 
+/* 2 argument vector functions added in ISA 3.0 (power9). */
+BU_P9V_AV_2 (VADUB,		"vadub",		CONST,  vaduv16qi3)
+BU_P9V_AV_2 (VADUH,		"vaduh",		CONST,  vaduv8hi3)
+BU_P9V_AV_2 (VADUW,		"vaduw",		CONST,  vaduv4si3)
+
+/* ISA 3.0 vector overloaded 2 argument functions. */
+BU_P9V_OVERLOAD_2 (VADU,	"vadu")
+BU_P9V_OVERLOAD_2 (VADUB,	"vadub")
+BU_P9V_OVERLOAD_2 (VADUH,	"vaduh")
+BU_P9V_OVERLOAD_2 (VADUW,	"vaduw")
+
 
 /* 2 argument extended divide functions added in ISA 2.06.  */
 BU_P7_MISC_2 (DIVWE,		"divwe",	CONST,	dive_si)
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index d313e9b20fb..79a7e88a5ee 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -4240,6 +4240,28 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
 
+  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUB,
+    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUH,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
+    RS6000_BTI_unsigned_V8HI, 0 },
+  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUW,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_unsigned_V4SI, 0 },
+
+  { P9V_BUILTIN_VEC_VADUB, P9V_BUILTIN_VADUB,
+    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+
+  { P9V_BUILTIN_VEC_VADUH, P9V_BUILTIN_VADUH,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
+    RS6000_BTI_unsigned_V8HI, 0 },
+
+  { P9V_BUILTIN_VEC_VADUW, P9V_BUILTIN_VADUW,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_unsigned_V4SI, 0 },
+
   { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
   { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index a0633543602..06d52b8ce0d 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -17493,6 +17493,31 @@ result returned from the @code{vec_srv} function is a
 (0x07 & shift_distance[i]))},
 with this resulting value coerced to the @code{unsigned char} type.
 
+The following built-in functions are available for the PowerPC family
+of processors, starting with ISA 3.0 or later (@option{-mcpu=power9})
+or with @option{-mpower9-vector}:
+@smallexample
+__vector unsigned char
+vec_absd (__vector unsigned char arg1, __vector unsigned char arg2);
+__vector unsigned short
+vec_absd (__vector unsigned short arg1, __vector unsigned short arg2);
+__vector unsigned int
+vec_absd (__vector unsigned int arg1, __vector unsigned int arg2);
+
+__vector unsigned char
+vec_absdb (__vector unsigned char arg1, __vector unsigned char arg2);
+__vector unsigned short
+vec_absdh (__vector unsigned short arg1, __vector unsigned short arg2);
+__vector unsigned int
+vec_absdw (__vector unsigned int arg1, __vector unsigned int arg2);
+@end smallexample
+
+The @code{vec_absd}, @code{vec_absdb}, @code{vec_absdh}, and
+@code{vec_absdw} built-in functions each computes the absolute
+differences of the pairs of vector elements supplied in its two vector
+arguments, placing the absolute differences into the corresponding
+elements of the vector result.
+
 If the cryptographic instructions are enabled (@option{-mcrypto} or
 @option{-mcpu=power8}), the following builtins are enabled.
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 878dfe02197..cd8531b866a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2016-06-13  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	* gcc.target/powerpc/vadsdu-0.c: New test.
+	* gcc.target/powerpc/vadsdu-1.c: New test.
+	* gcc.target/powerpc/vadsdu-2.c: New test.
+	* gcc.target/powerpc/vadsdu-3.c: New test.
+	* gcc.target/powerpc/vadsdu-4.c: New test.
+	* gcc.target/powerpc/vadsdu-5.c: New test.
+	* gcc.target/powerpc/vadsdub-1.c: New test.
+	* gcc.target/powerpc/vadsdub-2.c: New test.
+	* gcc.target/powerpc/vadsduh-1.c: New test.
+	* gcc.target/powerpc/vadsduh-2.c: New test.
+	* gcc.target/powerpc/vadsduw-1.c: New test.
+	* gcc.target/powerpc/vadsduw-2.c: New test.
+
 2016-06-13  David Malcolm  <dmalcolm@redhat.com>
 
 	* gcc.dg/c99-init-2.c (c): Update expected error message.
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c
new file mode 100644
index 00000000000..aa1d61de741
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsignedInt (__vector unsigned int *p,
+				 __vector unsigned int *q)
+{
+  __vector unsigned int source_1, source_2;
+  __vector unsigned int result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c
new file mode 100644
index 00000000000..cf10283b199
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsignedIntMacro (__vector unsigned int *p,
+				      __vector unsigned int *q)
+{
+  __vector unsigned int result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absd (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c
new file mode 100644
index 00000000000..27ea2b32559
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsignedShort (__vector unsigned short *p,
+				   __vector unsigned short *q)
+{
+  __vector unsigned short source_1, source_2;
+  __vector unsigned short result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c
new file mode 100644
index 00000000000..be0df32e220
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsignedShortMacro (__vector unsigned short *p,
+				      __vector unsigned short *q)
+{
+  __vector unsigned short result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absd (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c
new file mode 100644
index 00000000000..ffbd570c711
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsignedChar (__vector unsigned char *p,
+				  __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c
new file mode 100644
index 00000000000..20aa25efe21
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsignedCharMacro (__vector unsigned char *p,
+				       __vector unsigned char *q)
+{
+  __vector unsigned char result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absd (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c
new file mode 100644
index 00000000000..de1b9eef1cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsigned (__vector unsigned char *p,
+			      __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char uc_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  uc_result = __builtin_vec_vadub (source_1, source_2);
+  return uc_result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c
new file mode 100644
index 00000000000..de1b9eef1cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsigned (__vector unsigned char *p,
+			      __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char uc_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  uc_result = __builtin_vec_vadub (source_1, source_2);
+  return uc_result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c
new file mode 100644
index 00000000000..c208790d811
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsigned (__vector unsigned short *p,
+			      __vector unsigned short *q)
+{
+  __vector unsigned short source_1, source_2;
+  __vector unsigned short us_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  us_result = __builtin_vec_vaduh (source_1, source_2);
+  return us_result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c
new file mode 100644
index 00000000000..5fa2157e18e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsignedMacro (__vector unsigned short *p,
+				   __vector unsigned short *q)
+{
+  __vector unsigned short result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absdh (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c
new file mode 100644
index 00000000000..6cb66ba4c9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsigned (__vector unsigned int *p,
+			      __vector unsigned int *q)
+{
+  __vector unsigned int source_1, source_2;
+  __vector unsigned int ui_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  ui_result = __builtin_vec_vaduw (source_1, source_2);
+  return ui_result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c
new file mode 100644
index 00000000000..a614cf6d4ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsignedMacro (__vector unsigned int *p,
+				   __vector unsigned int *q)
+{
+  __vector unsigned int result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absdw (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */