From: Eric Anholt Date: Mon, 21 May 2012 17:01:20 +0000 (-0700) Subject: i965: Drop a layer of indirection in doing HiZ resolves. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=54308f78a2f8675bfd854761f9cd8a6b71e119d0;p=mesa.git i965: Drop a layer of indirection in doing HiZ resolves. Reviewed-by: Ian Romanick Reviewed-by: Chad Versace --- diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index d05b602ab8e..56997493318 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -238,18 +238,6 @@ void brwInitVtbl( struct brw_context *brw ) brw->intel.vtbl.render_target_supported = brw_render_target_supported; brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format; - if (brw->intel.has_hiz) { - if (brw->intel.gen == 7) { - brw->intel.vtbl.resolve_depth_slice = gen7_resolve_depth_slice; - brw->intel.vtbl.resolve_hiz_slice = gen7_resolve_hiz_slice; - } else if (brw->intel.gen == 6) { - brw->intel.vtbl.resolve_depth_slice = gen6_resolve_depth_slice; - brw->intel.vtbl.resolve_hiz_slice = gen6_resolve_hiz_slice; - } else { - assert(0); - } - } - if (brw->intel.gen >= 7) { gen7_init_vtable_surface_functions(brw); } else if (brw->intel.gen >= 4) { diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 8eed9dca01e..7b3bdf31d9d 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -1062,24 +1062,3 @@ gen6_blorp_exec(struct intel_context *intel, brw->state.dirty.cache = ~0; } -/** \see intel_context::vtbl::resolve_hiz_slice */ -void -gen6_resolve_hiz_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer) -{ - brw_hiz_op_params params(mt, level, layer, GEN6_HIZ_OP_HIZ_RESOLVE); - gen6_blorp_exec(intel, ¶ms); -} - -/** \see intel_context::vtbl::resolve_depth_slice */ -void -gen6_resolve_depth_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer) -{ - brw_hiz_op_params params(mt, level, layer, GEN6_HIZ_OP_DEPTH_RESOLVE); - gen6_blorp_exec(intel, ¶ms); -} diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.h b/src/mesa/drivers/dri/i965/gen6_blorp.h index 80961480362..969ead1a2e7 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.h +++ b/src/mesa/drivers/dri/i965/gen6_blorp.h @@ -32,18 +32,6 @@ extern "C" { struct intel_context; struct intel_mipmap_tree; -void -gen6_resolve_hiz_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer); - -void -gen6_resolve_depth_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer); - #ifdef __cplusplus } diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index fbb94dfed56..7ef0d36359f 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -783,25 +783,3 @@ gen7_blorp_exec(struct intel_context *intel, brw->state.dirty.brw = ~0; brw->state.dirty.cache = ~0; } - -/** \copydoc gen6_resolve_hiz_slice() */ -void -gen7_resolve_hiz_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer) -{ - brw_hiz_op_params params(mt, level, layer, GEN6_HIZ_OP_HIZ_RESOLVE); - gen7_blorp_exec(intel, ¶ms); -} - -/** \copydoc gen6_resolve_depth_slice() */ -void -gen7_resolve_depth_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer) -{ - brw_hiz_op_params params(mt, level, layer, GEN6_HIZ_OP_DEPTH_RESOLVE); - gen7_blorp_exec(intel, ¶ms); -} diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.h b/src/mesa/drivers/dri/i965/gen7_blorp.h index 43e4a10faea..caf5640dcd1 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.h +++ b/src/mesa/drivers/dri/i965/gen7_blorp.h @@ -32,20 +32,6 @@ extern "C" { struct intel_context; struct intel_mipmap_tree; -/** \copydoc gen6_resolve_hiz_slice() */ -void -gen7_resolve_hiz_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer); - -/** \copydoc gen6_resolve_depth_slice() */ -void -gen7_resolve_depth_slice(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer); - #ifdef __cplusplus } diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index d064f37c9c5..cc3ee0d3592 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -185,26 +185,6 @@ struct intel_context bool (*is_hiz_depth_format)(struct intel_context *intel, gl_format format); - /** - * \name HiZ operations - * - * See the following sections of the Sandy Bridge PRM, Volume 1, Part2: - * - 7.5.3.1 Depth Buffer Clear - * - 7.5.3.2 Depth Buffer Resolve - * - 7.5.3.3 Hierarchical Depth Buffer Resolve - * \{ - */ - void (*resolve_hiz_slice)(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer); - - void (*resolve_depth_slice)(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer); - /** \} */ - /** * Surface state operations (i965+ only) * \{ diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 2042afd76ec..40cd3d03019 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -608,18 +608,12 @@ intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt, level, layer, GEN6_HIZ_OP_DEPTH_RESOLVE); } -typedef void (*resolve_func_t)(struct intel_context *intel, - struct intel_mipmap_tree *mt, - uint32_t level, - uint32_t layer); - static bool intel_miptree_slice_resolve(struct intel_context *intel, struct intel_mipmap_tree *mt, uint32_t level, uint32_t layer, - enum gen6_hiz_op need, - resolve_func_t func) + enum gen6_hiz_op need) { intel_miptree_check_level_layer(mt, level, layer); @@ -629,7 +623,7 @@ intel_miptree_slice_resolve(struct intel_context *intel, if (!item || item->need != need) return false; - func(intel, mt, level, layer); + intel_hiz_exec(intel, mt, level, layer, need); intel_resolve_map_remove(item); return true; } @@ -641,8 +635,7 @@ intel_miptree_slice_resolve_hiz(struct intel_context *intel, uint32_t layer) { return intel_miptree_slice_resolve(intel, mt, level, layer, - GEN6_HIZ_OP_HIZ_RESOLVE, - intel->vtbl.resolve_hiz_slice); + GEN6_HIZ_OP_HIZ_RESOLVE); } bool @@ -652,15 +645,13 @@ intel_miptree_slice_resolve_depth(struct intel_context *intel, uint32_t layer) { return intel_miptree_slice_resolve(intel, mt, level, layer, - GEN6_HIZ_OP_DEPTH_RESOLVE, - intel->vtbl.resolve_depth_slice); + GEN6_HIZ_OP_DEPTH_RESOLVE); } static bool intel_miptree_all_slices_resolve(struct intel_context *intel, struct intel_mipmap_tree *mt, - enum gen6_hiz_op need, - resolve_func_t func) + enum gen6_hiz_op need) { bool did_resolve = false; struct intel_resolve_map *i, *next; @@ -669,7 +660,8 @@ intel_miptree_all_slices_resolve(struct intel_context *intel, next = i->next; if (i->need != need) continue; - func(intel, mt, i->level, i->layer); + + intel_hiz_exec(intel, mt, i->level, i->layer, need); intel_resolve_map_remove(i); did_resolve = true; } @@ -682,8 +674,7 @@ intel_miptree_all_slices_resolve_hiz(struct intel_context *intel, struct intel_mipmap_tree *mt) { return intel_miptree_all_slices_resolve(intel, mt, - GEN6_HIZ_OP_HIZ_RESOLVE, - intel->vtbl.resolve_hiz_slice); + GEN6_HIZ_OP_HIZ_RESOLVE); } bool @@ -691,8 +682,7 @@ intel_miptree_all_slices_resolve_depth(struct intel_context *intel, struct intel_mipmap_tree *mt) { return intel_miptree_all_slices_resolve(intel, mt, - GEN6_HIZ_OP_DEPTH_RESOLVE, - intel->vtbl.resolve_depth_slice); + GEN6_HIZ_OP_DEPTH_RESOLVE); } static void