From: lkcl <lkcl@web>
Date: Fri, 6 May 2022 20:23:53 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2357
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=547a0b09a8f4ce4b4e74857f995c8ebd42cf3067;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index b69170ea6..731397533 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -506,10 +506,15 @@ cycles until a countdown reaches zero. This extraordinarily simple
 concept needs no branches, and has no complex Register Hazard
 Management in the hardware
 because it is down to the programmer (or, the compiler),
-to ensure data overlaps do not occur.
+to ensure data overlaps do not occur.  Careful crafting of those
+14 instructions can keep the ALUs 100% occupied for sustained periods,
+and the iconic example for which the TI DSPs are renowned
+is that an entire inner loop for large FFTs
+can be done with that one VLIW word: no stalls, no stopping, no fuss.
 
 The key aspect of these
-very simplistic countdown loops is: *they are deterministic*.
+very simplistic countdown loops as far as we are concerned:
+is: *they are deterministic*.
 
 Zero-Overhead Loop Control takes this basic "single loop" concept
 way further: both nested loops and conditional exit are included,